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A43P8316G-95I 参数 Datasheet PDF下载

A43P8316G-95I图片预览
型号: A43P8316G-95I
PDF下载: 下载PDF文件 查看货源
内容描述: 1M ×16位×4银行同步DRAM [1M X 16 Bit X 4 Banks Synchronous DRAM]
分类和应用: 动态存储器
文件页数/大小: 42 页 / 502 K
品牌: AMICC [ AMIC TECHNOLOGY ]
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A43L2616B  
5. Write Interrupted by Precharge & DQM  
CLK  
Note 2  
CMD  
WR  
D0  
PRE  
Note 1  
DQM  
DQ  
D1  
D2 D3  
Masked by DQM  
Note : 1. To inhibit invalid write, DQM should be issued.  
2. This precharge command and burst write command should be of the same bank, otherwise it is not precharge  
interrupt but only another bank precharge of dual banks operation.  
6. Precharge  
1 ) N o rm a l W rite (B L = 4 )  
C L K  
C M D  
D Q  
W R  
D 0  
P R E  
D 1  
D 2  
D 3  
tR D L  
2 ) R e a d (B L = 4 )  
C L K  
C M D  
R D  
P R E  
Q 2  
D Q (C L 2 )  
Q 0  
Q 1  
Q 0  
Q 3  
Q 2  
D Q (C L 3 )  
Q 1  
Q 3  
7. Auto Precharge  
1) Normal Write (BL=4)  
CLK  
CMD  
DQ  
WR  
D0  
D1  
D2  
D3  
Note 1  
Auto Precharge Starts  
2) Read (BL=4)  
CLK  
CMD  
DQ(CL2)  
DQ(CL3)  
RD  
Q0  
Q1  
Q0  
Q2  
Q1  
Q3  
Q2  
Q3  
Note 1  
Auto Precharge Starts  
* Note : 1. The row active command of the precharge bank can be issued after tRP from this point.  
The new read/write command of other active bank can be issued from this point.  
At burst read/write with auto precharge,  
interrupt of the same/another bank is illegal.  
CAS  
(December, 2009, Version 1.3)  
17  
AMIC Technology, Corp.