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A43P8316V-95I 参数 Datasheet PDF下载

A43P8316V-95I图片预览
型号: A43P8316V-95I
PDF下载: 下载PDF文件 查看货源
内容描述: 1M ×16位×4银行同步DRAM [1M X 16 Bit X 4 Banks Synchronous DRAM]
分类和应用: 动态存储器
文件页数/大小: 42 页 / 502 K
品牌: AMICC [ AMIC TECHNOLOGY ]
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A43L2616B  
Self Refresh Entry & Exit Cycle  
* Note : TO ENTER SELF REFRESH MODE  
1. with CKE should be low at the same clock cycle.  
CAS  
,
&
CS RAS  
2. After 1 clock cycle, all the inputs including the system clock can be don’t care except for CKE.  
3. The device remains in self refresh mode as long as CKE stays “Low”.  
(cf.) Once the device enters self refresh mode, minimum tRAS is required before exit from self refresh.  
TO EXIT SELF REFRESH MODE  
4. System clock restart and be stable before returning CKE high.  
5.  
starts from high.  
CS  
6. Minimum tRC is required after CKE going high to complete self refresh exit.  
7. 4K cycle of burst auto refresh is required before self refresh entry and after self refresh exit.  
If the system uses burst refresh.  
(December, 2009, Version 1.3)  
34  
AMIC Technology, Corp.  
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