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A43E06161V-75UF 参数 Datasheet PDF下载

A43E06161V-75UF图片预览
型号: A43E06161V-75UF
PDF下载: 下载PDF文件 查看货源
内容描述: 512K ×16位×2组同步DRAM [512K X 16 Bit X 2 Banks Synchronous DRAM]
分类和应用: 动态存储器
文件页数/大小: 46 页 / 1290 K
品牌: AMICC [ AMIC TECHNOLOGY ]
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A43E06161  
Operating AC Parameter  
(AC operating conditions unless otherwise noted)  
Version  
Symbol  
Parameter  
Unit  
Note  
-75  
2
-95  
2
tRRD(min)  
tRCD(min)  
Row active to row active delay  
CLK  
ns  
1
1
27  
28.5  
RAS to  
delay  
CAS  
tRP(min)  
tRAS(min)  
tRAS(max)  
tRC(min)  
Row precharge time  
Row active time  
27  
57  
28.5  
57  
ns  
ns  
µs  
ns  
1
1
100  
Row cycle time  
84  
85.5  
1
tCDL(min)  
tRDL(min)  
tBDL(min)  
tCCD(min)  
Last data in new col. Address delay  
Last data in row precharge  
7.5  
2
8.5  
2
ns  
CLK  
ns  
2
1, 2  
2
Last data in to burst stop  
7.5  
7.5  
9.5  
9.5  
Col. Address to col. Address delay  
ns  
Note: 1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time and  
then rounding off to the next higher integer.  
2. Minimum delay is required to complete write.  
3. All parts allow every cycle column address change.  
PRELIMINARY (July, 2005, Version 0.1)  
7
AMIC Technology, Corp.  
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