A26E001A
AC Characteristics (SRAM Selected)
(TA = -25°C to +85°C, VCC = 1.8V to 3.3V)
Symbol
Read Cycle
tRC
Parameter
Min.
Max.
Unit
Read Cycle Time
500
-
ns
ns
ns
tAA
Address Access Time
-
-
450
450
tACE
Chip Enable Access Time
RAMCE
tOE
Output Enable to Output Valid
-
200
-
ns
ns
tCLZ
10
Chip Enable to Output in Low Z
RAMCE
tOLZ
tCHZ
Output Enable to Output in Low Z
10
-
-
ns
ns
100
Chip Disable to Output in High Z
RAMCE
tOHZ
tOH
Output Disable to Output in High Z
Output Hold from Address Change
-
100
-
ns
ns
10
Write Cycle
tWC
Write Cycle Time
500
220
-
-
ns
ns
tCW
Chip Enable to End of Write
RAMCE
tAS
tAW
tWP
tWR
tWHZ
tDW
tDH
Address Setup Time
0
220
200
0
-
ns
ns
ns
ns
ns
ns
ns
ns
Address Valid to End of Write
Write Pulse Width
-
-
Write Recovery Time
-
Write to Output in High Z
Data to Write Time Overlap
Data Hold from Write Time
Output Active from End of Write
-
100
100
0
-
-
-
tOW
10
Notes: tCHZ, tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit condition and are not
referred to output voltage levels.
(November, 1998, Version 2.1)
5
AMIC Technology, Inc.