A25L16P Series
Fast Read Dual Output (3Bh)
The Fast Read Dual Output (3Bh) instruction is similar to the
Fast_Read (0Bh) instruction except the data is output on two
pins, DO and DIO, instead of just DO. This allows data to be
transferred from the A25L16P at twice the rate of standard SPI
devices.
(See AC Characteristics). This is accomplished by adding eight
“dummy” clocks after the 24-bit address as shown in figure 10.
The dummy clocks allow the device’s internal circuits additional
time for setting up the initial address. The input data during the
dummy clocks is “don’t care”. However, the DIO pin should be
high-impedance prior to the falling edge of the first data out
clock.
Similar to the Fast Read instruction, the Fast Read Dual Output
instruction can operate at the highest possible frequency of fC
Figure 10. FAST_READ_DUAL_OUTPUT Instruction Sequence and Data-Out Sequence
S
6
0
1
2
3
4
5
7
8
9 10
28 29 30 31
C
DIO
DO
Instruction
24-Bit Address
21
23
2
1
0
22
3
MSB
High Impedance
S
C
32 33 34 35 36 37 38 39 40
Dummy Byte
41 42 43 44 45 46 47
DIO switches from input to output
7
6
5
4
3
2
0
6
4
2
0
6
4
2
0
6
4
2
3
0
1
6
7
4
5
2
3
0
1
1
DIO
DO
3
1
3
5
7
5
1
5
7
7
7
MSB
MSB
MSB
Data Out 1
Data Out 2
Data Out 3
Data Out 4
Note: Address bits A23 to A21 are Don’t Care.
PRELIMINARY (March, 2006, Version 0.2)
15
AMIC Technology Corp.
AMICC [ AMIC TECHNOLOGY ]
