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A25L032M-F 参数 Datasheet PDF下载

A25L032M-F图片预览
型号: A25L032M-F
PDF下载: 下载PDF文件 查看货源
内容描述: 32兆低电压,双I / O串行闪存 [32Mbit Low Voltage, Dual-I/O Serial Flash Memory]
分类和应用: 闪存
文件页数/大小: 50 页 / 854 K
品牌: AMICC [ AMIC TECHNOLOGY ]
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A25L032 Series
PIN DESCRIPTION
Chip Select (
S
)
The SPI Chip Select (
S
) pin enables and disables device
operation. When Chip Select (
S
) is high the device is
deselected and the Serial Data Output (DO, or IO
0
, IO
1
) pins
are at high impedance. When deselected, the devices power
consumption will be at standby levels unless an internal
erase, program or write status register cycle is in progress.
When Chip Select (
S
) is brought low the device will be
selected, power consumption will increase to active levels
and instructions can be written to and data read from the
device. After power-up, Chip Select (
S
) must transition from
high to low before a new instruction will be accepted.
Serial Data Input, Output and IOs (DI, DO and IO
0
, IO
1
)
The A25L032 support standard SPI and Dual SPI operation.
Standard SPI instructions use the unidirectional DI (input) pin
to serially write instructions, addresses or data to the device
on the rising edge of the Serial Clock (C) input pin. Standard
SPI also uses the unidirectional DO (output) to read data or
status from the device on the falling edge of Serial Clock (C).
Dual SPI instructions use the bidirectional IO pins to serially
write instructions, addresses or data to the device on the
rising edge of Serial clock (C) and read data or status from
the device on the falling edge of Serial Clock (C).
Write Protect (
W
)
The Write Protect (
W
) pin can be used to prevent the Status
Register from being written. Used in conjunction with the
Status Register’s Block Protect (CMP, SEC, TB, BP2, BP1
and BP0) bits and Status Register Protect (SRP1, SRP0) bits,
a portion or the entire memory array can be hardware
protected. The Write Protect (
W
) pin is active low.
Hold (
HOLD
)
The Hold (
HOLD
) pin allows the device to be paused while
it is actively selected. When Hold (
HOLD
) pin is brought low,
while Chip Select (
S
) pin is low, the DO pin will be at high
impedance and signals on the DI and Serial Clock (C) pins
will be ignored (don’t care). When Hold (
HOLD
) pin is
brought high, device operation can resume. The Hold
function can be useful when multiple devices are sharing the
same SPI signals. The Hold (
HOLD
) pin is active low.
Serial Clock (C)
The SPI Serial Clock Input (C) pin provides the timing for
serial input and output operations.
(March, 2012, Version 1.3)
4
AMIC Technology Corp.