A25LQ080 Series
Program / Erase Suspend
The Suspend instruction allows the system to interrupt a
Sector or Block Erase operation or a Page Program
operation and then read from or program data to, any other
sectors or blocks. The Suspend instruction sequence is
shown in figure 29.
the BUSY bit equals to 0, the Suspend instruction will be
ignored by the device. A maximum of time of “tSUS” (See AC
Characteristics) is required to suspend the erase or program
operation. The WIP bit in the Status Register will be cleared
from 1 to 0 within “tSUS” and the SUS bit in the Status
The Write Status Register instruction (01h) and Erase
instructions (20h, 52h, D8h, C7h, 60h) are not allowed during
Erase Suspend. Erase Suspend is valid only during the
Sector or Block erase operation. If written during the Chip
Erase operation, the Erase Suspend instruction is ignored.
The Write Status Register instruction (01h) and Page
Program instructions (02h) are not allowed during Program
Suspend. Program Suspend is valid only during the Page
Program operation.
The Suspend instruction will be accepted by the device only
if the SUS bit in the Status Register equals to 0 and the WIP
bit equals to 1 while a Sector or Block Erase or a Page
Program operation is on-going. If the SUS bit equals to 1 or
Register will be set from
Program/Erase Suspend. For
Program/Erase operation, it is also required that the Suspend
instruction is not issued earlier than a minimum of time of
“tSUS” following the preceding Resume instruction.
Unexpected power off during the Program/Erase suspend
state will reset the device and release the suspend state.
SUS bit in the Status Register will also reset to 0. The data
within the page, sector or block that was being suspended
may become corrupted. It is recommended for the user to
implement system design techniques against the accidental
power interruption and preserve data integrity during
Program/Erase suspend state.
0
to
a
1
immediately after
previously resumed
Figure 28. Suspend Instruction Sequence
S
tSUS
1
3
0
2
4
5
6
7
C
Instruction (75h or B0h)
DIO
DO
High Impedance
Accept Read or Program
Instruction
Table 8. Operations Allowed and Not Allowed During a Program or Erase Suspend
Command
Read Commands
Operation During Program Suspend
Operation During Erase Suspend
Read Data
Allowed
Allowed
Program and Erase Commands
PP
Not Allowed
Not Allowed
Allowed
SE/ BE/ CE
Status Register Commands
RDSR-1/ RDSR-2
WRSR
Not Allowed
Allowed
Allowed
Not Allowed
Not Allowed
Other Commands
SUSPEND
Not Allowed
Allowed
Not Allowed
Allowed
RESUME
HPM
Allowed
Allowed
WREN
Allowed
Allowed
WRDI
Allowed
Allowed
RDID/ REMS/ RES/ SFDP
DP
Allowed
Allowed
Not Allowed
Not Allowed
(April, 2016, Version 1.0)
38
AMIC Technology Corp.
AMICC [ AMIC TECHNOLOGY ]
