P R E L I M I N A R Y
MCP DEVICE BUS OPERATIONS
This section describes the requirements and use of
the device bus operations, which are initiated through
the internal command register. The command register
itself does not occupy any addressable memory loca-
tion. The register is a latch used to store the com-
mands, along with the address and data information
Table 1.
Operation
(Notes 1, 2)
Read from Flash
CE#f
needed to execute the command. The contents of the
register serve as inputs to the internal state machine.
The state machine outputs dictate the function of the
device. Tables 1-2 lists the device bus operations, the
inputs and control levels they require, and the result-
ing output. The following subsections describe each of
these operations in further detail.
Device Bus Operations—Flash Word Mode, CIOf = V
IH
CE2s
X
L
H
L
X
H
L
L
X
X
X
H
H
X
X
X
X
X
SADD,
A6 = L,
A1 = H,
A0 = L
SADD,
A6 = H,
A1 = H,
A0 = L
X
X
L
X
X
X
X
H
H
L
X
L
L/H
High-Z
High-Z
L/H
High-Z
High-Z
L
H
H
X
X
L
X
H
L
L
X
H
L
L
X
X
X
X
L
X
L
L
H
L
L
H
H
X
H
X
L
V
ID
(Note 6)
D
IN
D
OUT
High-Z
D
OUT
D
IN
High-Z
D
IN
High-Z
D
OUT
D
OUT
High-Z
D
IN
D
IN
High-Z
A
IN
X
X
H
V
CC
±
0.3 V
(Note 4)
D
IN
D
IN
A
IN
X
X
H
D
OUT
D
OUT
OE#
WE#
Addr.
LB#s
UB#s
RESET#
WP#/ACC
(Note 4)
DQ7–
DQ0
DQ15–
DQ8
CE1#s
H
L
X
H
Write to Flash
L
X
V
CC
±
0.3 V
L
H
X
L
H
Standby
H
High-Z
High-Z
Output Disable
Flash Hardware Reset
X
X
H
Sector Protect
(Note 5)
L
X
H
X
X
V
ID
L/H
D
IN
X
Sector Unprotect (Note
5)
L
X
H
X
X
X
X
V
ID
(Note 6)
D
IN
X
Temporary Sector
Unprotect
Read from SRAM
H
L
H
L
H
A
IN
H
L
L
Write to SRAM
H
L
H
X
L
A
IN
H
L
Legend:
L = Logic Low = V
IL
, H = Logic High = V
IH
, V
ID
= 11.5–12.5 V, V
HH
= 9.0 ± 0.5 V, X = Don’t Care, SADD = Flash Sector Address, A
IN
=
Address In, D
IN
= Data In, D
OUT
= Data Out
Notes:
1. Other operations except for those indicated in this column are inhibited.
2. Do not apply CE#f = V
IL
, CE1#s = V
IL
and CE2s = V
IH
at the same time.
3. Don’t care or open LB#s or UB#s.
4. If WP#/ACC = V
IL
, the boot sectors will be protected. If WP#/ACC = V
IH
the boot sectors protection will be removed.
If WP#/ACC = V
ACC
(9V), the program time will be reduced by 40%.
5. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “Sector/Sector Block Protection
and Unprotection” section.
6. If WP#/ACC = V
IL
, the two outermost boot sectors remain protected. If WP#/ACC = V
IH
, the two outermost boot sector protection depends on
V
HH,
all sectors will be unprotected.
10
Am42DL6404G
March 20, 2002
AMD [ ADVANCED MICRO DEVICES ]
