LOGIC SYMBOL—ÉlanSC400 MICROCONTROLLER
LCDD7 [VL_BE3]
LCDD6 [VL_LDEV]
LCDD5 [VL_D/C]
LCDD4 [VL_LRDY]
LCDD3 [VL_M/IO]
LCDD2 [VL_W/R]
MWE
CASL/H1–CASL/H0
RAS1–RAS0
MA11–MA5
MA4
DRAM Interface
and Feature
Configuration Pins
MA3 {CFG3}
MA2 {CFG2}
MA1 {CFG1}
LCDD1 [VL_ADS]
LCD Graphics
Controller or
LCDD0 [VL_RST]
VESA Local Bus
M [VL_BE2]
LC [VL_BE1]
MA0 {CFG0}
D15–D0
SCK [VL_BE0]
FRM [VL_LCLK]
DRAM, VL, ROM, ISA
and PC Card Data
SD15–SD0 [D31–D16]
LVEE [VL_BRDY]
LVDD [VL_BLAST]
SA25–SA0
VL, ROM, ISA, and
PC Card Address
DTR, RTS, SOUT
CTS, DCD, DSR
RIN, SIN
ROMCS1–ROMCS0
ROMRD
8-Pin Serial Port
Infrared Interface
ROM/FlashMemory
Control
ROMWR
SIROUT
SIRIN
IOR
PC Card Command
ISA Bus Command
and Reset
IOW
Power
Management
Interface
ACIN
MEMR
BL2–BL1
MEMW
RSTDRV
BL0 [CLK_IO]
GPIO_CS0
GPIO_CS1
MCEL_A [[BNDSCN_TCK]]
MCEH_A [[BNDSCN_TMS]]
GPIOs
GPIO_CS2 [[DBUFRDL]]
GPIO/External
Buffer Control
RST_A [[BNDSCN_TDI]]
REG_A [[BNDSCN_TDO]]
GPIO_CS3 [[DBUFRDH]]
GPIO_CS4 [[DBUFOE]]
Dedicated Single
Slot PC Card and
Boundary Scan
Interface
CD_A
ÉlanSC400
Microcontroller
292 BGA
GPIO_CS5 [IOCS16]
RDY_A
BVD1_A, BVD2_A
WP_A
GPIO_CS6 [IOCHRDY]
GPIO_CS7 [PIRQ1]
GPIO_CS8 [PIRQ0]
GPIO_CS9 [TC]
GPIO/ISA
Interface
WAIT_AB
OE
GPIO_CS10 [AEN]
WE
ICDIR
GPIO_CS11 [PDACK0]
GPIO_CS12 [PDRQ0]
GPIO31 [STRB] [MCEL_B]
GPIO_CS13 [PCMA_VCC]
GPIO_CS14 [PCMA_VPP1]
GPIO15 [PCMA_VPP2]
GPIO16 [PCMB_VCC]
GPIO17 [PCMB_VPP1]
GPIO18 [PCMB_VPP2]
GPIO30 [AFDT] [MCEH_B]
GPIO29 [SLCTIN] [RST_B]
GPIO28 [INIT] [REG_B]
GPIO/PC Card
Power Control
Parallel Port or
SecondPCCardor
GPIOs
GPIO27 [ERROR] [CD_B]
GPIO26 [PE] [RDY_B]
GPIO19 [LBL2]
GPIO20 [CD_A2]
GPIO25 [ACK] [BVD1_B]
GPIO24 [BUSY] [BVD2_B]
GPIO23 [SLCT] [WP_B]
GPIO22 [PPOEN]
KBD_COL7
Scan Keyboard
Columns/IRQs/XT
Keyboard Interface
KBD_COL6-2 / PIRQ7-3
KBD COL1-0 [XT_CLK/DATA]
SUS_RES / KBD_ROW14
GPIO21 [PPDWE]
KBD_ROW13 [[R32BFOE]]
KBD_ROW12 [MCS16]
32KXTAL1, 32KXTAL2
LF_INT, LF_LS
KBD_ROW11 [SBHE]
KBD_ROW10 [BALE]
KBD_ROW9 [PIRQ2]
KBD_ROW8 [PDRQ1]
KBD_ROW7 [PDACK1]
32-kHz Crystal
Loop Filters
Scan Keyboard
Rows/ISA Interface
LF_VID, LF_HS
Reset
RTC
RESET
VCC_RTC
BBATSEN
KBD_ROW6 [MA12]
KBD_ROW5 [RAS3]
Scan Keyboard
Rows/DRAM
Interface
KBD_ROW4 [RAS2]
KBD_ROW3 [CASH3]
KBD_ROW2 [CASH2]
KBD_ROW1 [CASL3]
KBD_ROW0 [CASL2]
SPKR
Speaker
Boundary Scan
Enable
BNDSCN_EN
Notes:
/ =Two functions available on the pin at the same time. { } = Function during hardware reset. [ ] = Alternative function selected by
firmware configuration. [[ ]] = Alternate function selected by a hardware configuration pin state at power-on reset. This does not apply
to [[BNDSCN_TCK]], [[BNDSCN_TMS]], [[BNDSCN_TDI]], and [[BNDSCN_TDO]]. These alternate functions are enabled by the
BNDSCN_EN signal.
6
Élan™SC400 and ÉlanSC410 Microcontrollers Data Sheet
AMD [ AMD ]
