Notes:
1. The keyboard column signals are shared with the programmable IRQs and XT keyboard signals.
As keyboard column signals and XT keyboard signals, they are inputs and open drain outputs with pullup or pulldown
resistors in normal operation and Suspend mode. Each column signal is individually programmable for the pullup or pulldown
in the keyboard extended registers.
As IRQs, the pins are inputs with built-in pullup or pulldown resistors (use the same registers in the keyboard controller to
enable pullups or pulldowns). During Suspend mode, they stay as inputs with the pullup or pulldown. Or, if Power-Down
Group C is enabled for the ISA bus to be powered down in Suspend mode and a bit is set identifying that these signals are
being used as IRQs, they will have pulldown resistors activated. There is no programmable bit to make these signals IRQs
beyond the extended register in the interrupt controller that maps the pin to a particular IRQ. If the system must use any of
these as IRQs, a bit must be set, notifying the chip, so that they can have the pulldown resistors invoked in Suspend mode.
Summary: As keyboard column and XT keyboard signals:
–Pullup or pulldown resistor depending on the setting of the Keyboard Column Pullup/Pulldown register in the keyboard
controller.
Summary: As programmable IRQ signals:
–Pullup or pulldown resistors during normal operation and Suspend (depending on the configuration register in the
keyboard controller.
–Pulldown resistors during suspend if Power-Down Group C (the ISA bus) is enabled for power-down in Suspend, and a
bit is set indicating that these signals are used as IRQs and need to be pulled down in Suspend.
2. RAS3–RAS2, CASH3–CASH2, and CASL3–CASL2 Suspend state of the pins:
–The RAS and CAS signals remain active if the DRAM interface is configured for CAS-before-RAS refresh in Suspend
mode.
–The RAS and CAS signals will be Low if the DRAM is configured for self-refresh in Suspend mode.
–Will be three-stated with a pulldown resistor if the DRAM interface is programmed to be disabled so the DRAM can be
powered down (Power-Down Group A).
–Will not be affected by this when the RAS and CAS signals that share pins with other functions are not enabled to come
out of the chip.
Summary: These pins have built-in pulldown resistors that are invoked by:
–Suspend mode and DRAM interface programmed for power-down in Suspend (Power-Down Group A), and the pins are
enabled as RAS/CAS for RAS3–RAS2, CASH3–CASH2, and CASL3–CASL2.
3. Memory Address MA12 Suspend state of the pin:
Will be three-stated with a pulldown resistor. This will work for CAS-before-RAS refresh, self-refresh, and the DRAM powered
down.
Summary: This pin has a built-in pulldown resistor that is invoked by Suspend mode.
4. The data buffer control signal R32BFOE that is shared with the keyboard row signal:
When the data buffer control signals are enabled on the pins, they will drive inactive during Suspend mode, go three-state
without resistors to allow an external resistor to 5 V, or three-state with a pulldown to support powering off the data buffer.
Summary: KBD_ROW13/R32BFOE: Built-in pullup and pulldown resistors that are invoked by:
–Reset invokes the pullup.
–As R32BFOE, this pin is an output without a pullup or pulldown.
–When buffer control is enabled and in Suspend mode, R32BFOE has three options:
•High (inactive) with no pullup or pulldown.
•Three-state with a pulldown if it is programmed for the buffer to be powered off in Suspend mode.
•Three-state with no pulldown if it is programmed for the buffer to be powered on in Suspend mode and at 5 V.
–When enabled as the keyboard row signal, this signal has a pullup enabled at all times.
54
Élan™SC400 and ÉlanSC410 Microcontrollers Data Sheet
AMD [ AMD ]
