ERASE AND PROGRAMMING PERFORMANCE
Parameter
Typ (Note 1)
Max (Note 2)
Unit
s
Comments
Sector Erase Time
0.7
22.5
9
15
Excludes 00h programming
prior to erasure (Note 4)
Chip Erase Time
s
Byte Programming Time
Chip Programming Time (Note 4)
300
54
µs
s
Excludes system level
overhead (Note 5)
18
Notes:
1. Typical program and erase times assume the following conditions: 25°C, 3.0 V V , 1,000,000 cycles. Additionally,
CC
programming typicals assume checkerboard pattern.
2. Under worst case conditions of 90°C, V = 2.7 V, 1,000,000 cycles.
CC
3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes
program faster than the maximum program times listed.
4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.
5. System-level overhead is the time required to execute the four- or two-bus-cycle sequence for the program command. See
Table 8 for further information on command definitions.
6. The device has a guaranteed minimum erase and program cycle endurance of 1,000,000 cycles.
LATCHUP CHARACTERISTICS
Description
Min
Max
Input voltage with respect to V on all pins except I/O pins
(including A9, OE#, and RESET#)
SS
–1.0 V
12.5 V
Input voltage with respect to V on all I/O pins
–1.0 V
V
+ 1.0 V
CC
SS
V
Current
–100 mA
+100 mA
CC
Includes all pins except V . Test conditions: V = 3.0 V, one pin at a time.
CC
CC
TSOP PIN CAPACITANCE
Parameter
Symbol
Parameter Description
Input Capacitance
Test Setup
Typ
6
Max
7.5
12
Unit
pF
C
V
= 0
IN
IN
C
Output Capacitance
Control Pin Capacitance
V
= 0
8.5
7.5
pF
OUT
OUT
C
V
= 0
IN
9
pF
IN2
Notes:
1. Sampled, not 100% tested.
2. Test conditions T = 25°C, f = 1.0 MHz.
A
DATA RETENTION
Parameter
Test Conditions
150°C
Min
10
Unit
Years
Years
Minimum Pattern Data Retention Time
125°C
20
44
Am29LV017D
AMD [ AMD ]
