ded Program Algorithm which is an internal algorithm
that automatically times the program pulse widths and
verifies proper cell margin. Erase is accomplished by
executing the erase command sequence. This will in-
voke the Embedded Erase Algorithm which is an inter-
nal algorithm that automatically preprograms the array
if it is not already programmed before executing the
erase operation. During erase, the device automatically
times the erase pulse widths and verifies proper cell
margin.
highest levels of quality, reliability and cost
effectiveness. The Am29F016 memory electrically
erases all bits within a sector simultaneously via
Fowler-Nordheim tunneling. The bytes are pro-
grammed one byte at a time using the EPROM pro-
gramming mechanism of hot electron injection.
Flexible Sector-Erase Architecture
■ Thirty two 64 Kbyte sectors
■ Eight sector groups each of which consists of 4
adjacent sectors in the following pattern: sectors
0–3, 4–7, 8–11, 12–15, 16–19, 20–23, 24–27, and
28–31.
This device also features a sector erase architecture.
This allows for sectors of memory to be erased and re-
programmed without affecting the data contents of
other sectors. A sector is typically erased and verified
within one second. The Am29F016 is erased when
shipped from the factory.
■ Individual-sector or multiple-sector erase capability
■ Sector group protection is user-definable
The Am29F016 device also features hardware sector
group protection. This feature will disable both pro-
gram and erase operations in any combination of eight
sector groups of memory. A sector group consists of
four adjacent sectors grouped in the following pattern:
sectors 0–3, 4–7, 8–11, 12–15, 16–19, 20–23, 24–27,
and 28–31.
SA31
SA30
SA29
SA28
1FFFFFh
1EFFFFh
1DFFFFh
1CFFFFh
1BFFFFh
1AFFFFh
19FFFFh
18FFFFh
17FFFFh
16FFFFh
15FFFFh
14FFFFh
13FFFFh
12FFFFh
11FFFFh
10FFFFh
1FFFFFh
1EFFFFh
1DFFFFh
1CFFFFh
1BFFFFh
1AFFFFh
09FFFFh
08FFFFh
07FFFFh
06FFFFh
05FFFFh
04FFFFh
03FFFFh
02FFFFh
01FFFFh
00FFFFh
000000h
64 Kbyte
64 Kbyte
64 Kbyte
64 Kbyte
Sector
Group
7
AMD has implemented an Erase Suspend feature that
enables the user to put erase on hold for any period of
time to read data from, or program data to, a sector that
was not being erased. Thus, true background erase
can be achieved.
The device features single 5.0 Volt power supply oper-
ation for both read and write functions. Internally gen-
erated and regulated voltages are provided for the
program and erase operations. A low VCC detector au-
tomatically inhibits write operations during power tran-
sitions. The end of program or erase is detected by the
RY/BY pin, Data Polling of DQ7, or by the Toggle Bit I
(DQ6).Once the end of a program or erase cycle has
been completed, the device automatically resets to the
readmode.
32 Sectors Total
The Am29F016 also has a hardware RESET pin.
When this pin is driven low, execution of any Embed-
ded Program Algorithm or Embedded Erase Algorithm
will be terminated. The internal state machine will then
be reset into the read mode. The RESET pin may be
tied to the system reset circuitry. Therefore, if a system
reset occurs during the Embedded Program Algorithm
or Embedded Erase Algorithm, the device will be auto-
matically reset to the read mode. This will enable the
system’s microprocessor to read the boot-up firmware
from the Flash memory.
SA3
SA2
SA1
SA0
64 Kbyte
64 Kbyte
64 Kbyte
64 Kbyte
Sector
Group
0
18805D-1
AMD’s Flash technology combines years of Flash
memory manufacturing experience to produce the
2
Am29F016
AMD [ AMD ]
