P R E L I M I N A R Y
AC CHARACTERISTICS
Erase and Program Operations
Parameter
JEDEC
Std.
Description
70
90
90
0
120
Unit
ns
t
t
Write Cycle Time (Note 1)
Min
Min
Min
Min
70
120
AVAV
WC
t
t
Address Setup Time
ns
AVWL
WLAX
AS
t
Address Setup Time to OE# low during toggle bit polling
Address Hold Time
45
45
45
45
50
50
ns
ASO
t
t
ns
AH
Address Hold Time From CE# or OE# high
during toggle bit polling
t
Min
0
ns
AHT
t
t
t
Data Setup Time
Min
Min
Min
35
20
45
0
50
25
ns
ns
ns
DVWH
DS
t
Data Hold Time
WHDX
DH
t
Output Enable High during toggle bit polling
20
OEPH
Read Recovery Time Before Write
(OE# High to WE# Low)
t
t
Min
0
ns
GHWL
GHWL
t
t
t
CE# Setup Time
Min
Min
Min
Min
Min
Typ
Typ
Typ
Min
Min
Min
0
0
ns
ns
ns
ns
ns
ELWL
WHEH
WLWH
CS
CH
WP
t
t
CE# Hold Time
t
Write Pulse Width
35
35
30
0
50
t
t
Write Pulse Width High
Zero Latency Between Read and Write Operations
WHDL
WPH
t
SR/W
Byte
Programming Operation (Note 2)
Word
9
t
t
µs
WHWH1
WHWH2
WHWH1
11
0.7
50
0
t
t
Sector Erase Operation (Note 2)
sec
µs
WHWH2
t
V
Setup Time (Note 1)
VCS
CC
t
Write Recovery Time from RY/BY#
Program/Erase Valid to RY/BY# Delay
ns
RB
t
90
ns
BUSY
Notes:
1. Not 100% tested.
2. See the “Erase and Programming Performance” section for more information.
Am29DL800B
31
AMD [ AMD ]
