P R E L I M I N A R Y
FUNCTIONAL DESCRIPTION
The Am186ES and Am188ES microcontrollers are
based on the architecture of the original Am186 and
Am188 microcontrollers—the 80C186 and 80C188 mi-
crocontrollers. The Am186ES and Am188ES micro-
controllers function in the enhanced mode of earlier
generations of Am186 and Am188 microcontrollers.
Enhanced mode includes system features such as
power-save control.
ment register used for physical address generation is
implied by the addressing mode used (see Table 5).
Shift
Left
4 Bits
Segment
4
1
2
A
Base
Logical
15
0
Address
Offset
0
0
2
2
Each of the 8086, 8088, 80186, and 80188 microcon-
trollers contains the same basic set of registers, in-
structions, and addressing modes. The Am186ES and
Am188ES microcontrollers are backward compatible
with the 80C186 and 80C188 microcontrollers.
0
15
1
2
A
0
4
2
0
0
19
0
0
2
0
A full description of all the Am186ES and Am188ES mi-
crocontroller registers and instructions is included in
the Am186ES and Am188ES Microcontrollers User’s
Manual, order# 21096.
15
Physical Address
1
2
A
6
2
0
19
Memory Organization
To Memory
Figure 3. Two-Component Address
Memory is organized in sets of segments. Each seg-
ment is a linear contiguous sequence of 64K (216) 8-bit
bytes. Memory is addressed using a two-component
address that consists of a 16-bit segment value and a
16-bit offset. The 16-bit segment values are contained
in one of four internal segment registers (CS, DS, SS,
or ES). The physical address is calculated by shifting
the segment value left by 4 bits and adding the 16-bit
offset value to yield a 20-bit physical address (see Fig-
ure 3). This allows for a 1-Mbyte physical address size.
I/O Space
The I/O space consists of 64K 8-bit or 32K 16-bit ports.
Separate instructions (IN, INS and OUT, OUTS) ad-
dress the I/O space with either an 8-bit port address
specified in the instruction, or a 16-bit port address in
the DX register. Eight-bit port addresses are zero-ex-
tended such that A15–A8 are Low. I/O port addresses
00F8h through 00FFh are reserved.
All instructions that address operands in memory must
specify the segment value and the 16-bit offset value.
For speed and compact instruction encoding, the seg-
Table 5. Segment Register Selection Rules
Memory Reference
Needed
Segment Register Used
Code (CS)
Implicit Segment Selection Rule
Instructions (including immediate data)
All data references
Instructions
Local Data
Data (DS)
All stack pushes and pops;
any memory references that use BP Register
Stack
Stack (SS)
Extra (ES)
External Data (Global)
All string instruction references that use the DI Register as an index
38
Am186/188ES and Am186/188ESLV Microcontrollers
AMD [ AMD ]
