D A T A S H E E T
During the unlock bypass mode, only the Unlock
Bypass Program and Unlock Bypass Reset commands
are valid. To exit the unlock bypass mode, the system
must issue the two-cycle unlock bypass reset
command sequence. The first cycle must contain the
data 90h; the second cycle the data 00h. Addresses
are don’t cares. The device then returns to reading
array data.
START
Write Program
Command Sequence
The device offers accelerated program operations
through the WP#/ACC pin. This function is intended
only to speed in-system programming of the device
during system production. When the system asserts
VHH on the WP#/ACC pin, the device automatically
enters the Unlock Bypass mode. The system may then
write the two-cycle Unlock Bypass program command
sequence. The device uses the higher voltage on the
WP#/ACC pin to accelerate the operation. Note that the
WP#/ACC pin must not be at VHH for any operation
other than accelerated programming, or device
damage may result. In addition, the WP#/ACC pin must
not be left floating or unconnected; inconsistent
behavior of the device may result.
Data Poll
from System
Embedded
Program
algorithm
in progress
Verify Data?
Yes
No
No
Increment Address
Last Address?
Yes
Figure 3 illustrates the algorithm for the program oper-
ation. See “Erase/Program Operations” on page 38 for
parameters, and Figure 17, on page 39 for timing
diagrams.
Programming
Completed
Note: See Table 12, on page 26 for program command
sequence.
Figure 3. Program Operation
January 23, 2007 21635C5
Am29SL160C
23
AMD [ AMD ]
