AMD
Am7969-125 TAXIchip Receiver (Notes 13, 14, 22)
Parameter
No.
Symbol
Parameter Description
Test Conditions
Min
Max
Unit
Bus Interface Signals:
DO0–DO7,DO8/CO3,DO9/CO2,CO0–CO1,DSTRB,CSTRB, IGM,CLK,CNB,VLTN
35
36
tP
CLK Period (Note 24)
8n
25n
ns
ns
2t35
n
tPD
Data Valid to STRB↑ Delay
TTL Output Load
TTL Output Load
TTL Output Load
TTL Output Load
TTL Output Load
TTL Output Load
TTL Output Load
TTL Output Load
TTL Output Load
TTL Output Load
TTL Output Load
TTL Output Load
2t35
n
37
38
38a
39
40
41
42
43
44
45
tPD
tPD
tPD
tPD
tPW
tPW
tPW
tPD
tPD
tPD
CLK↓ to STRB↑
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
+15
t35
n
3t35
n
CLK↑ to STRB↓
–7
–14
STRB↑ to CLK↑ (Note 23)
CLK↓ to Data Valid Delay
STRB Pulse Width HIGH
CLK Pulse Width HIGH
CLK Pulse Width LOW
SERIN to CLK↓ Delay
CLK↑ to IGM↓
t35
n
-
+
23
5t35
2n
5t35
n
5t35
n
–15
–15
+17
5t35
n
t35
2n
2t35
n
+26
+7
2t35
n
2t35
n
CLK↑ to IGM↑
+10
46
47
tPD
tS
CNB↓ to IGM↓
20
ns
ns
2t35
n
CNB↑ to CLK↑ Setup Time
(Note 5)
-
-
–32
–31
t35
n
47A
tS
CNB↓ to CLK↑ Setup Time
(Note 19)
ns
2t35
n
+5
48
49
tH
CNB↓ to CLK↑ Hold
ns
ns
2t35
n
tPW
CNB Pulse Width LOW
Serial Interface Signals: SERIN+, SERIN–
✝
57
tJ
SERIN± Peak to Peak Input Jitter
5
ns
Tolerance (Note 16)
Miscellaneous Signals: X1 (Note 15)
60
61
tPW
tPW
X1 Pulse Width HIGH
X1 Pulse Width LOW
35
35
ns
ns
25
Am7968/Am7969-125
AMD [ AMD ]
