Revision 1.02 – June 27, 2006
S5935 – PCI Product
Data Book
This 16-bit register contains the PCI Command. The
function of this register is defined by the PCI specifica-
tion and its implementation is required of all PCI
devices. Only six of the ten fields are used by this
device; those which are not used are hardwired to 0.
The definitions for all fields are provided here for
completeness.
PCI COMMAND REGISTER (PCICMD)
PCI Command
04h-05h
Register Name
Address Offset
Power-up value
Boot-load
0000h
not used
Read/Write (R/W on 6 bits, Read
Only for all others)
Attribute
16 bits
Size
Figure 10. PCI Command Register
3
0
0
8
7
2
1
9
6
5
0
4
0
15
Reserved = 00's
X
X
X
0X X0
Fast Back-to-Back
SERRE
Wait Cycle Enable
Parity Error Enable
Palette Snoop Enable
Memory Write and Invalidate Enable
Special Cycle Enable
Bus Master Enable
Memory Access Enable
I/O Access Enable
36
DS1527
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AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
