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ARCHITECTURAL OVERVIEW
FEATURES
DESCRIPTION
S5935
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PCI 2.1 Compliant Master/Slave Device
Full 132 Mbytes/sec Transfer Rate
Supports new Intel 440BX/GX Chipsets
Supports new WinNT Service Pack 2 & 3
PCI Bus Operation DC to 33 MHz
8/16/32 Bit Add-On User Bus
Four Definable Pass-Thru Data Channels
Two 32 Byte Internal FIFOs w/DMA
Synchronous Add-On Bus Operation
Mail Box Registers w/Byte Level Status
Direct Mail Box Data Strobe/Interrupts
Direct PCI & Add-On Interrupt Pins
Optional Non-Volatile Memory Boot Loading
Optional Expansion BIOS/POST Code
The PCI Local bus concept was developed to break the
PC data I/O bottleneck and clearly opens the door to
increasing system speed and expansion capabilities.
The PCI Local bus moves high speed peripherals from
the I/O bus and places them closer to the system’s
processor bus, providing faster data transfers between
the processor and peripherals. The PCI Local bus also
addresses the industry’s need for a bus standard which
is not directly dependent on the speed, size and type of
system processor. It represents the first microproces-
sor independent bus offering performance more than
adequate for the most demanding applications such as
full-motion video.
Applied Micro Circuits Corporation (AMCC), the pre-
mier supplier of single chip solutions, has developed the
S5935 to solve the problem of interfacing applications
to the PCI Local bus while offering support for newer
PCI chipsets and operating systems. The S5935 is a
powerful and flexible PCI controller supporting several
levels of interface sophistication. At the lowest level, it
can serve simply as a PCI bus Target with modest
transfer requirements. For high-performance applica-
tions, the S5935 can become a Bus Master to attain the
PCI Local bus peak transfer capability of 132 MBytes/
sec. The S5935 PCI controller also maintains drop-in
compatibility for upgrading many existent S5933 de-
signs requiring migration into new motherboard archi-
tectures, PCI BIOSs and software operating systems.
APPLICATIONS
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High Speed Networking
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Digital Video Applications
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I/O Communications Ports
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High Speed Data Input/Output
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Multimedia Communications
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Memory Interfaces
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High Speed Data Acquisition
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Data Encryption/Decryption
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Intel i960 Interface
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General Purpose PCI Interfacing
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Existent S5933 Design Upgrades
Figure 1. S5935 Block Diagram
S5935
Pass-Thru Data &
Address Registers
PCI Local Bus
User
Application
I/O Audio
ISDN
FDDI
ATM
Graphics/
MPEG/
Grabber
Proprietary
Backplane
Satellite
Receiver/
Modem
2.1 PCI Local Bus
Interface Logic
Mux/Demux
Bus Master Transfer
Count & Address
Registers
FIFOs
AMCC
Add-On
Local Bus
Interface Logic
Mux/Demux
Buffers
Buffers
Mailboxes
Read/Write
Control
Configuration
Registers
Status Registers
Serial/Parallel nvRAM
Configuration Space
Expansion BIOS
1-1