Revision 5.01 – November 30, 2005
S5335 – PCI Bus Controller, 3.3V
Data Sheet
PCI Command Register (PCICMD)
This 16-bit register contains the PCI Command. The
function of this register is defined by the PCI specifica-
tion and its implementation is required of all PCI
devices. Only six of the ten fields are used by this
device; those which are not used are hardwired to 0.
The definitions for all fields are provided here for
completeness.
PCI Command
04h-05h
Register Name:
Address Offset:
Power-up value:
Boot-load:
0000h
not used
Read/Write (R/W on 6 bits, Read
Only for all others)
Attribute:
16 bits
Size:
Figure 9. PCI Command Register
9
8
7
6
5
0
4
0
3
2
1
0
15
Reserved =00's
0
X
0
X
X
X
0
X
FastBack-to-Back
SERRE
WaitCycle Enable
Parity Error Enable
PaletteSnoopEnable
MemoryWrite and Invalidate Enable
SpecialCycleEnable
Bus MasterEnable
MemoryAccess Enable
I/OAccess Enable
AMCC Confidential and Proprietary
DS1657 31
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
