Revision 5.01 – November 30, 2005
S5335 – PCI Bus Controller, 3.3V
Data Sheet
Revision Identification Register (RID)
The RID register contains the revision identification
number. This field is initially cleared. Write operations
from the PCI interface have no effect on this register.
After reset is removed, this field can be boot-loaded
from the external non-volatile device (if present and
valid) so that another value may be used.
Revision Identification
Register Name:
Address Offset:
Power-up value:
Boot-load:
08h
00h
External nvRAM/EPROM offset 048h
Read Only
8 bits
Attribute:
Size:
Figure 11. Revision Identification Register
7
0
00h
Revision Identification Number (RO)
Table 21. Revision Identification Register
Bit
Description
7:0 Revision Identification Number. Initialized to zeros, this register may be loaded to the value in non-volatile memory at
offset 048h.
AMCC Confidential and Proprietary
DS1657 35