2.488 GBPS – 2.7 GBPS QUAD MUX WITH FAN OUT BUFFERS
Input Structures
S3053
Two input structures exist in this part; TTL and High Speed, Differential Inputs. The LVTTL Inputs will interface with
any LVTTL outputs. The High Speed, Differential Inputs can be AC Coupled. Therefore, the High Speed, differen-
tial Input buffers are biased at Vcc -0.5V. Refer to Figure 6 for High Speed Differential Input termination.
Figure 6. Input Termination
Biased at Vcc -0.5V
S3053
100
Ω
Figure 7. Output Termination
VCC
50Ω
50Ω
100
Ω
VSWx
S3053
GND
VEEx
Rext*
* Reduced Swing Amplitude
October 10, 2000 / Revision D
9