SONET/SDH/ATM OC-12 TRANSMITTER AND RECEIVER
S3017/S3018
Performance Specifications
Parameter
Min
Typ
Max
Units
Condition
Nominal VCO
Center Frequency
622.08
MHz
PECL Data
Output Jitter
In CSU mode, given 14 ps rms
jitter on REFCKIN in 12KHz to
5 MHz band
OC-12/STS-12
16
ps (rms)
Reference Clock
Frequency Tolerance
Clock Synthesis
Clock Recovery
Required to meet SONET output
frequency specification
-20
-100
+20
+100
ppm
ppm
OC-12/STS-12
Capture Range
±200ppm
+2,-8%
With respect to fixed reference
frequency
Lock Range
Minimum transition density of
20%
With device already powered up
and valid reference clock
Acquisition Lock Time
16
µsec
Reference Clock
Input Duty Cycle
30
70
% of period
ns
Reference Clock Rise &
Fall Times
2.0
10% to 90% of amplitude
PECL Output Rise &
Fall Times
(S3017 LPDATOP/N)
20% to 80%, 50 Ω to Vcc -2V
equivalent load, 5pF cap
600
450
ps
ps
Source Terminated Diff.
PECL Compatible
Output Rise & Fall
Times (S3017
20% to 80%, 100 Ω line to line
SERDATOP/N)
13
December 10, 1999 / Revision B
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
