S2064 QUAD SERIAL BACKPLANE DEVICE
Figure 6. DIN Data Clocking with TCLK
VCO/10 or VCO/20
REF
OSCILLATOR
S2064
Figure 7. DIN Clocking with REFCLK
VCO/10
REF
OSCILLATOR
REFCLK
TCLKO
PLL
REFCLK
TCLKO
PLL
DINx[0:7]
DINx[0:7]
TCLKx
TCLKx
MAC
ASIC
S2064
MAC
ASIC
S2064
The S2064 also supports the traditional REFCLK
(TBC) clocking found in Fibre Channel and Gigabit
Ethernet application and is illustrated in Figure 7.
This approach imposes significant challenges in
maintaining timing margins on the designer.
Half Rate Operation
The S2064 supports full and 1/2 rate operation for all
modes of operation. When RATE is LOW, the S2064
serial data rate equals the VCO frequency. When
RATE is HIGH, the VCO is divided by 2 before being
provided to the chip. Thus the S2064 can support
Fibre Channel and serial backplane functions at both
full and 1/2 the VCO rate.
8B/10B Coding
The S2064 provides 8B/10B line coding for each
channel. The 8B/10B transmission code includes se-
rial encoding and decoding rules, special characters,
and error control. Information is encoded, 8 bits at a
time, into a 10 bit transmission character. The char-
acters defined by this code ensure that enough tran-
sitions are present in the serial bit stream to make
clock recovery possible at the receiver. The encod-
ing also greatly increases the likelihood of detecting
any single or multiple errors that might occur during
the transmission and reception of data
1
.
The 8B/10B transmission code includes D-charac-
ters, used for data transmission, and K-characters,
used for control or protocol functions. Each D-char-
acter and K-character has a positive and a negative
parity version. The parity of each codeword is se-
lected by the encoder to control the running disparity
of the data stream. K-character generation is con-
trolled individually for each channel using the
KGENx input. When KGEN is asserted, the data on
the parallel input is mapped into the corresponding
control character. The parity of the K-character is
selected to minimize running disparity in the serial
data stream. Table 2 lists the K characters sup-
ported by the S2064 and identifies the mapping of
the DIN[7:0] bits to each character.
A special input, SOF, is provided for each channel to
simplify the generation of the K28.5 character. When
SOF is asserted, the K28.5 character is generated
regardless of the data on the parallel input. The K28.5
character can be of either positive or negative parity,
depending on the current running disparity. When the
chip is in CHANNEL LOCK mode, assertion of SOFA
causes the K28.5 to be generated on all four serial
data streams, SOFC is ignored. When SOFD is as-
serted during CHANNEL LOCK mode, this resets the
Channel Lock State Machine. Table 3 shows the
mapping of the 8B/10B characters representation.
Data is transmitted bit “a” or DIN[0] first.
1
1. A.X. Widner and P.A. Franaszek, "A Byte-Oriented DC Bal-
anced (0,4) 8B/10B Transmission Code," IBM Research Report
RC9391, May 1982.
October 13, 2000 / Revision G
7
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
