“CROSSBOW” 32 X 32 800 MBIT/S CROSSPOINT SWITCH
S2024
Table 4. Pin Assignment and Descriptions
Pin Name
Level I/O
Pin # Description
DIN31
DIN30
DIN29
DIN28
DIN27
DIN26
DIN25
DIN24
DIN23
DIN22
DIN21
DIN20
DIN19
DIN18
DIN17
DIN16
DIN15
DIN14
DIN13
DIN12
DIN11
DIN10
DIN9
ECL
I
181
180
179
177
176
175
174
169
167
166
164
161
160
159
157
156
155
154
153
152
150
145
143
142
141
140
139
137
136
134
135
131
Intput data. Active High.
DIN8
DIN7
DIN6
DIN5
DIN4
DIN3
DIN2
DIN1
DIN0
OUTADD4
OUTADD3
OUTADD2
OUTADD1
OUTADD0
TTL
TTL
I
I
13
5
Output configuration register address. Used to select the output
configuration registers in the register file.
3
2
1
INADD5
INADD4
INADD3
INADD2
INADD1
INADD0
21
20
19
18
15
14
Input data addresses. Used to select the input data pin
connected to each output data pin. Stored into register file by
CNFGCLK. INADD5=1 is used to select the expansion data
inputs.
OAEN
TTL
ECL
I
I
190
Output address enable. When high, enables the selection of
appropriate output configuration register.
MDCLK
MDCLKN
66
65
Master latch clock inputs (input data). True differential inputs.
Can be used single-ended with VBB1 and VBB2.
5
June 15, 1999 / Revision B
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
