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S10123PSI 参数 Datasheet PDF下载

S10123PSI图片预览
型号: S10123PSI
PDF下载: 下载PDF文件 查看货源
内容描述: [Interface Circuit, CMOS, PBGA324, 19 X 19 MM, 1 MM PITCH, LEAD FREE, FBGA-324]
分类和应用: 电信电信集成电路
文件页数/大小: 6 页 / 720 K
品牌: AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
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P R O D U C T B R I E F  
Yahara - S10123, S10124, S10126  
As with the S10123 device, the S10124 also supports two 10G  
MACs for full 10GbE traffic monitoring on both the Transmit  
and Receive datapaths of the device. In addition, the S10124  
device also provides OTU-2 and WIS (OC-192/STM-64) Drop/  
Insert ports for out-of-band overhead monitoring and  
provisioing capability.  
Via the S10124/S10126’s two serial 10G interfaces and SFI4.1  
interface, the S10124/S10126 devices are also ideally suited for  
ODU-2 to OTU-2 regenerator applications.  
Serial 10G Interface(s)  
YAHARA(s) 10G serial line interface(s) supports the following  
LAN/WAN/OTN Frequencies/Protocols  
As with the S10123 device, all major blocks within S10124  
device can be provisionally bypassed, including the GFP-T and  
GFP-F mappers, the WIS Frame Generator/Termination blocks,  
and the GFEC/EFEC Frame Generators/Termination and  
Encoder/Decoder blocks.  
8G Fibre Channel (8.5Gb/s)  
10GbE LAN (10.3Gb/s)  
10G Fibre Channel (10.51875 Gb/s)  
OC-192/STM-64/WAN (9.954 Gb/s)  
Standard OTU-2 (10.709Gb/s)  
The S10126 device supports a dedicated serial 10G Client  
inteface and a dedicated serial 10G Line inteface. It is ideal for  
10x10G to 100G muxponder applications, as the GMP mapping  
mode allows for the synchronizing of asynchronous ODU-2s to  
a common OTU-4 clock, resulting in a dramatically reduced  
number of external PLLs required. In addition, the S10126  
supports all of the other mapping modes of the S10123 and  
S10124 devices, as well as the two 10G MACs for full 10GbE  
traffic monitoring, and OTU-2 and WIS Drop/Insert ports for  
out-of-band overhead monitoring and provisioning capability.  
Overclocked 10GbE to OTU-2 (11.096Gb/s and 11.049Gb/s)  
Overclocked 10G FC to OTU-2 (11.32Gb/s and 11.27Gb/s)  
Fully integrated CMU, CDR and SERDES  
The lower Line Rates modes are associated with the fixed stuff  
byte columns being used for user data.  
XAUI/SFI4.2/SFI-5s System/Backplane Interface  
YAHARA’s System/Backplane Interface is XAUI/SFI4.2/SFI-5s  
compliant  
In the XAUI mode, it supports 4 x [3.125Gb/s] in 10GbE oper-  
ation] or 4 x [3.1875 in 10G Fibre Channel operation]  
One of the key features of the YAHARA device(s) is its Forward  
Error Correction capabilities. The YAHARA device(s) support  
the ITU G.790 (GFEC) standard and AMCC’s widely adopted  
enhanced FEC (eFEC) to enable long haul transmission by  
compensating for the optical noise in the optical link. Also,  
YAHARA’s XFI serial 10G interfaces have built in Electronic  
Dispersion Compensation (EDC) that mitigates chromatic  
dispersion to enable longer transmission distances.  
In the SFI4.2 mode it supports 4 x [2.19Gb/s] to [2.94Gb/s]  
In the SFI-5s mode it supports 5 x [2.125Gb/s] to [2.85Gb/s]  
Fully XAUI and Fibre Channel SxI5 (SFI4.2 & SFI-5S) Jitter  
Compliant  
Clocking  
Flexible clocking configurations for Carrier Ethernet and  
Transport applications.  
With the S10123 device, G.709 FEC or eFEC can be provisionally  
appended to the outgoing ODU-2 line signal to produce a jitter  
compliant OTU-2 serial 10Gb/s output signal. In the reverse  
direction, the S10123 can receive a 10G OTU-2 signal on the  
serial 10Gb/s Line receive input, terminate the GFEC/eFEC,  
perform OTU-2 frame monitoring, and send the ODU-2 signal  
directly to the System output interface. The 10G MAC, GFP and  
WIS blocks can be bypassed in both the transmit/receive  
direction.  
On chip fractional Clock Managment Unit (fracN) from one  
common reference clock input for all Baud rates for Metro/  
Carrier Ethernet applications  
For Transport applications the fracN can be used for backup  
AIS applications and for Receiver CDR reference  
Recovered clock reference outputs for Client/Line Interfaces  
Demapped clock reference outputs for Client/Line Interfaces  
“Right Sized” Transport of 10GE-LAN signals through OTN  
Network  
GFP-F encapsulation used for packing 10GE-LAN signal into  
“Right Sized” OTU-2 signal resulting in channel rate of 10.7  
GHz  
With the S10124 and S10126 device, in addition to terminating  
and generating G.709/eFEC OTU-2 signals on the Line side, the  
S10124 and S10126 devices can also generate G.709 FEC  
signals on the outgoing ODU-2 Client signal to produce a jitter  
compliant OTU-2 serial 10Gb/s output Client signal. In the  
reverse direction, the S10124/S10126’s Client signal can  
receive a 10G OTU-2 signal on the serial 10Gb/s Line RX receive  
input, terminate the GFEC, perform OTU-2 frame monitoring,  
and send the ODU-2 signal directly to the Line Side for GFEC/  
GFEC or GFEC/eFEC regneration, or to the System output  
interface. Again, the 10G MAC, GFP and WIS blocks can be  
bypassed in both the transmit/receive direction.  
Two different flow-control options used on client to allow for  
10GE-LAN signal to be packed into OTU-2  
Proprietary 10GE-LAN mapping into an OTU-2, via GFP-F,  
without transport rate increase or client flow control  
10GE-LAN into WIS to allow for SONET/SDH grooming of  
10GE client  
G.709 ODU-2 Synchronous and Asynchronous Mapping  
1 x OC192/STM-64 mapping (239,237) per G.709  
The S10124 also supports an SFI4.1 interface that can be used  
on either the Client or Line interface. The SFI4.1 interface is  
ideal for supporting fully tuneable laser MSA Optic Modules.  
Direct map (239,238) into ODU-2  
AppliedMicro Confidential and Proprietary