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S10123PSI 参数 Datasheet PDF下载

S10123PSI图片预览
型号: S10123PSI
PDF下载: 下载PDF文件 查看货源
内容描述: [Interface Circuit, CMOS, PBGA324, 19 X 19 MM, 1 MM PITCH, LEAD FREE, FBGA-324]
分类和应用: 电信电信集成电路
文件页数/大小: 6 页 / 720 K
品牌: AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
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P R O D U C T B R I E F  
Yahara - S10123, S10124, S10126  
Figure 1. S10124 in a Single Chip Full-Duplex Transponder FEC Regenerator Application  
AppliedMicro  
S10124  
25x25  
pkg  
APM  
S19252  
device can provisionally map 10GbE or 10G Fibre Channel into  
OTN and WIS Compliant signals. The mapped 10GbE or 10G  
Fibre Channel traffic can be transported over OTN, WIS  
(SONET/SDH) networks. Additionally, 8G Fibre Channel can be  
GFP-T mapped and transported over OTN networks. S10123  
also supports OTN and WIS bypass modes to enable pure LAN  
Phy applications for 10GbE and 10G Fibre Channel signals.  
Technology, Package and Power  
Technology: 0.13 Micron CMOS  
Package: Two Options  
S10123/S10126: 324 pin FC-BGA (Flip Chip Ball Grid Array),  
19x19 mm body, 1.0 mm ball pitch  
S10124: 576 pin FC-BGA, 25x25mm, 1.0 mm ball pitch  
Power supply Voltages: 1.2 V Core, 2.5 V CMOS I/O (3.3 V tol-  
erant) and 1.8V for Analog I/O macros  
S10123 also sports two 10G MACs for full 10GbE traffic  
monitoring on both the Transmit and Receive datapaths of the  
device.  
Power dissipation:  
S10123: 1.93 - 3.05 Watts (Typical)  
S10123 also provides SONET/SDH Line/Section monitoring of  
OC-192/STM-64 signals, OTN overhead monitoring of OTU-2/  
ODU-2 signals, and PCS monitoring of 10GbE and 10G/8G Fibre  
Channel client signals.  
S10124: 3.28 - 4.31 Watts (Typical)  
S10126: 2.65 - 3.40 Watts (Typical)  
Power varies with operation modes and interfaces used  
S10123PBI (Leaded); S10123PSI (LeadFree)  
S10124PBI (Leaded); S10124PSI (LeadFree)  
S10126PBI (Leaded); S10126PSI (LeadFree)  
The S10123 also supports OTU-2 and WIS (OC-192/STM-64)  
Drop/Insert ports for out-of-band overhead monitoring and  
provisioing capability.  
All major blocks within S10123 can be provisionally bypassed,  
including the GFP-T and GFP-F mappers, the WIS Frame  
Generation/Termination blocks, the GFEC/EFEC Encoder/  
Decoder, and the OTU/ODU Frame Generation/Termination  
blocks.  
The YAHARA Integrated Circuit is a highly integrated 10G  
Framer/Mapper with two on-chip serial 10G interfaces, making  
it ideal for 10G Client to Line Mapper, and GFEC to eFEC  
regenerator applications. Its serial interfaces enable 10GbE  
LAN, 8G/10G Fibre Channel, WIS (OC-192/STM-64), and ODU-2/  
OTU-2 network connections. The YAHARA is targeted towards  
Dense Wave Division Multiplexors, Packet Optical Transport  
Systems (POTs), Core Switch Routers, and Multi-Service-  
Transport-System (MSTP) applications.  
The S10124 device provides dedicated serial 10G Client and  
Line interaces. In addition, the S10124 device also supports a  
parallel 16-bit SFI4.1 interface that is shared between the  
Client and Line interfaces. In addition, the S10124 also sports a  
XAUI/SFI4.2/SFI-5s system/backplane interface. Due to its rich  
I/O, and built in Client GFEC Termination/Regeneration and  
Line GFEC/EFEC Termination/Regeneration features, the  
S10124 device is ideal for transponder and FEC regenerator  
applications. With the system/backplane interface, the S10124  
device offers the utmost in application flexiblity. As with  
S10123, the S10124 can also be used for 10G Client Line Card  
and 10G Mapper applications.  
The YAHARA device is offered in three bond-out options, a  
19x19 sqmm package (S10123) for 10G Line Card Applications,  
a 25x25 sqmm package (S10124) for 10G Transponder  
applications and a second 19x19 sqmm package (S10126) for  
10x10G to 100G muxponder applications.  
The S10123 device provides a XAUI/SFI4.2/SFI-5s system/  
backplane interface and a 10Gb/s High Speed Serial Line  
Interface. Via its rich suite of mapping modes, the S10123  
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