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QT2032 参数 Datasheet PDF下载

QT2032图片预览
型号: QT2032
PDF下载: 下载PDF文件 查看货源
内容描述: [10 Gb/s Serial-to-XAUI PHY ICs for Ethernet and Fibre Channel LAN/ SAN/WAN Applications (CDR)]
分类和应用: 局域网
文件页数/大小: 220 页 / 2383 K
品牌: AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
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QT2022/32 - Data Sheet: DS3051  
RX_ALARM  
RX_ALARM is used to indicate that a fault has occurred on the receive path. RX_ALARM is the bitwise OR of the-  
receive path status register bits in register 1.9003h. RX_ALARM can be programmed to assert only when specific  
receive path fault conditions are present. The programming is performed by writing to a mask register at address  
1.9000h. The contents of register 1.9003h is AND’ed with register 1.9000h prior to application of the OR function to  
generate the RX_ALARM signal.  
RX_ALARM = {OR of (reg 1.9003.n ‘bit wise AND’ reg 1.9000.n) for n=0..9})  
Table 24: Receive Alarm Registers (RX_ALARM)  
MDIO Status Register  
(RO)  
MDIO Enable Register (R/  
W)  
Definition  
LEGACY=0 LEGACY=1  
Description  
16b hex  
type  
RO/LH  
16b hex  
default value  
PHY_XS Receive Local Fault  
(MDIO 4.8.10 = 1.0008.a h)  
NOT (XAUI PLL locked)  
1.9003.0  
1.9000.0  
1
rx_flag  
bitwise OR of rx_flag register, 1.9007h  
1.9003.1  
1.9003.2  
1.9003.3  
RO/LH  
RO/LH  
RO/LH  
1.9000.1  
1.9000.2  
1.9000.3  
0
0
1
PCS Receive Code Violation  
PCS Receive Local Fault  
invalid 66b code word detected  
NOT(block_lock)  
(linked to 3.8.10)  
PMA Receive Local Fault  
NOT(ReceivePLL  
Lock)  
NOT(ReceivePLL  
Lock) or  
1.9003.4  
RO/LH  
1.9000.4  
1
(linked to 1.8.10)  
RXLOSB_I==0  
(linked to 1.8.10)  
Receive Optical Power Fault 1  
PHY_XS Receive Rate Error  
WIS Alarm Interrupt Flag 2  
1.A071h.7 OR  
1.A071h.6  
Reserved, RO  
1.9003.5  
1.9003.6  
1.9003.7  
1.9003.8  
1.9003.9  
1.9003.f:a  
RO  
1.9000.5  
1.9000.6  
1.9000.7  
1.9000.8  
1.9000.9  
1.9000.f:a  
1, LEGACY=0  
0, LEGACY=1  
Receive FIFO overflow/underflow error  
(4.C002h.7 OR 4.C002h.6)  
RO/LH  
RO  
0
0
0
0
0
bitwise OR of WIS ALARM INTERRUPT  
register, 2.33 (2.21h)  
WIS Extended Alarm Interrupt  
Flag 2  
bitwise OR of WIS EXTENDED ALARM  
INTERRUPT register, 2.C502h  
RO  
WIS Local Fault 2  
NOT(SONET frame sync)  
(linked to 2.1.7)  
RO/LH  
RO  
Reserved, set to 0  
1.  
undefined if LEGACY = 1.  
2.  
Valid in QT2032 WAN mode only. In QT2022, these alarms are Reserved, RO (including QT2032 in LAN mode).  
64  
AppliedMicro - Confidential & Proprietary  
Revision 5.11  
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