QT2022/32 - Data Sheet: DS3051
13.2 WIS Registers (Device 2) (QT2032 only)
The Device 2 registers are defined for the QT2032 only. For the QT2022, writes to these registers are ignored.
Reads from these registers will return all 0’s.
Bit
WIS Control 1 Reg 2.0
0
Reserved, RO
6:1
Speed selection (RO):
always 5’b10000
12:7
13
Reserved, RO
Speed selection (RO)
always 1
14
15
loopback (RW)
1=enable loopback mode
0=disable loopback mode
Reset (RW/SC)
1=WIS reset
0=normal operation
Bit
WIS Status 1 Reg 2.1
0
1
Reserved, RO
Power down capability, RO
1 = ability to power down
2
Link Status (RO/LL)
1=WIS link up
0=WIS link down
Link Status == WIS Sync AND PLM-P AND LOP-P AND AIS-P AND AIS-L
6:3
7
Reserved, RO
WIS Local Fault 1 (RO/LH)
Reserved, RO
15:8
1. WIS Local Fault = NOT (WIS Sync). WIS Sync is defined in IEEE 802.3-2005 Clause 50.4.
WIS Identifier
WIS Identifier
2.3
Bit
2.2
WIS Identifier 1, RO
0043h = 0000_0000_0100_0011
15:0
WIS Identifier, RO
A400h =
1010_0100_0000_0000
1. The WIS unique identifier is the AMCC identifier.
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