欢迎访问ic37.com |
会员登录 免费注册
发布采购

PPC460EX-SUA1000T 参数 Datasheet PDF下载

PPC460EX-SUA1000T图片预览
型号: PPC460EX-SUA1000T
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microprocessor, 1000MHz, CMOS, PBGA728, 35 X 35 MM, ROHS COMPLIANT, PLASTIC, MS-034, TEEBGA-728]
分类和应用: 时钟外围集成电路
文件页数/大小: 106 页 / 1089 K
品牌: AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
 浏览型号PPC460EX-SUA1000T的Datasheet PDF文件第9页浏览型号PPC460EX-SUA1000T的Datasheet PDF文件第10页浏览型号PPC460EX-SUA1000T的Datasheet PDF文件第11页浏览型号PPC460EX-SUA1000T的Datasheet PDF文件第12页浏览型号PPC460EX-SUA1000T的Datasheet PDF文件第14页浏览型号PPC460EX-SUA1000T的Datasheet PDF文件第15页浏览型号PPC460EX-SUA1000T的Datasheet PDF文件第16页浏览型号PPC460EX-SUA1000T的Datasheet PDF文件第17页  
Revision 1.19 – June 17, 2009  
460EX – PPC460EX Embedded Processor  
Preliminary Data Sheet  
Features include:  
• PLB4 (128-bit)  
– 128-bit implementation of the PLB architecture  
– Separate and simultaneous read and write data paths  
– 64-bit address  
– Simultaneous control, address, and data phases  
– Four levels of pipelining  
– Byte-enable capability supporting unaligned transfers  
– 32- and 64-byte burst transfers  
– 200MHz, maximum 12.8GB/s (simultaneous read and write)  
– Processor:bus clock ratios of N:1  
• AHB  
– 32-bit data path  
– 32-bit address  
– Synchronous to the PLB  
– Up to 200MHz, maximum 800MB/s  
• OPB  
– 32-bit data path with dynamic sizing for 32-, 16-, and 8-bit width  
– 32-bit address  
– 100MHz  
• DCR  
– 32-bit data path  
– 10-bit address  
Security Function (Optional)  
The built-in security function is a cryptographic engine attached to the PLB with built-in DMA and interrupt  
controllers.  
Features include:  
• Federal Information Processing Standard (FIPS) 140-2 design  
• Support for an unlimited number of Security Associations (SA)  
• Different SA formats for each supported protocol (IPsec/SSL/TLS/sRTP)  
• Internet Protocol Security (IPSec) features  
– Full packet transforms, Encapsulated Security Payload (ESP) and Authentication Header (AH)  
– Complete header and trailer processing (IPv4 and IPv6)  
– Multi-mode automatic padding  
– "Mutable bit" handler for AH, including IPv4 option and IPv6 extension headers  
– Extended Sequence Number (ESN) processing for ESP and AH  
• Secure Socket Layer (SSL) and Transport Layer Security (TLS) features and Datagram Transport Layer  
Security (DTLS) features  
– Packet transforms  
– One-pass hash-then-encrypt for SSL and TLS packet transforms for inbound packet using Stream Cipher  
• Secure Real-Time Protocol (sRTP) features  
– Packet transforms  
– Roll Over Counter (ROC) removal and TAG insertion  
– Variable bypass offset of header length per packet  
• Media Access Control Security (MACSec) features  
– MSDU (User data) encryption 0, 30, or 50 bytes offset  
– Header insertion and removal  
– SecTAG header with or without Secure Channel Identifier (SCI) field  
– 128-bit key, 96-bit IV (nonce) and 128-bit ICV  
– IV from SA record or from input buffer (as part of SecTAG)  
– ICV generation and validation  
AMCC Proprietary  
13  
Downloaded from DatasheetLib.com - datasheet search engine