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PPC460EX-SUB1000T 参数 Datasheet PDF下载

PPC460EX-SUB1000T图片预览
型号: PPC460EX-SUB1000T
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microprocessor, 1000MHz, CMOS, PBGA728, 35 X 35 MM, ROHS COMPLIANT, PLASTIC, MS-034, TEEBGA-728]
分类和应用: 时钟外围集成电路
文件页数/大小: 106 页 / 1089 K
品牌: AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
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Revision 1.19 – June 17, 2009  
460EX – PPC460EX Embedded Processor  
Preliminary Data Sheet  
Table 1. System Memory Address Map (Part 3 of 3)  
Function  
Sub Function  
PCI Express Memory  
Start Address  
End Address  
Size  
128MB  
64KB  
0000 000C 0000 0000  
0000 000C 0800 0000  
0000 000C 0801 0000  
0000 000C 0880 0000  
0000 000C 0C00 0000  
0000 000C 0EC0 0000  
0000 000C 0EC0 0008  
0000 000C 0EC8 0000  
0000 000C 0EC8 1200  
0000 000C 0ED0 0000  
0000 000C 0ED0 0004  
0000 000C 1000 0000  
0000 000C 1000 0100  
0000 000C FF00 0000  
0000 000D 0000 0000  
0000 0010 0000 0000  
0400 0000 0000 0000  
1000 0000 0000 0000  
2000 0000 0000 0000  
0000 000C 07FF FFFF  
0000 000C 0800 FFFF  
0000 000C 087F FFFF  
0000 000C 0BFF FFFF  
0000 000C 0EBF FFFF  
0000 000C 0EC0 0007  
0000 000C 0EC7 FFFF  
0000 000C 0EC8 11FF  
0000 000C 0ECF FFFF  
0000 000C 0ED0 0003  
0000 000C 0FFF FFFF  
0000 000C 1000 00FF  
0000 000C FEFF FFFF  
0000 000C FFFF FFFF  
0000 000F FFFF FFFF  
03FF FFFF FFFF FFFF  
0FFF FFFF FFFF FFFF  
1FFF FFFF FFFF FFFF  
FFFF FFFF FFFF FFFF  
PCI I/O  
PC Express Memory  
PCI Extra I/O  
~8MB  
~56MB  
~44MB  
8B  
PCI Express Memory  
PCI Configuration Registers  
Reserved  
~512KB  
4.75KB  
~512KB  
4B  
PCI/PCIE Space (HB)  
PCI Local Registers  
Reserved  
PCI Special Cycle  
Reserved  
~19MB  
256B  
PCI Express Interrupt Handler  
PCI, PCI Express Memory  
PCI Boot ROM (PCI Memory)  
PCI, PCI Express Memory  
~3.8MB  
16MB  
12GB  
4
Reserved  
5
Reserved  
XOR Space (HB)  
PCI/PCIE Space (HB)  
Notes:  
XOR  
PCI, PCI Express Memory  
1. DDR SDRAM, SRAM (L2 Cache) and On-Chip Memory (OCM) can be located anywhere in the Local Memory area of the memory  
map.  
2. The Boot ROM area of the memory map are intended for use by ROM or Flash-type devices. While locating volatile DDR SDRAM and  
SRAM in this region is supported, use of these regions for this purpose is not recommended.  
3. When the optional boot from PCI Memory is selected, the PCI Boot ROM address space begins at 0000 000C FF00 0000 (16 MB).  
4. Never decoded.  
5. Unpredictable results on Read and Write operations.  
6. Accessed by means of EBC Peripheral Bank Configuration Registers.  
AMCC Proprietary  
9
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