Revision 1.19 – June 17, 2009
460EX – PPC460EX Embedded Processor
Preliminary Data Sheet
Address Maps
The PPC460EX incorporates two address maps. The first is a fixed processor System Memory Address Map. This
address map defines the possible contents of various address regions which the processor can access. The
second is the DCR Address Map for Device Configuration Registers (DCRs). The DCRs are accessed by software
running on the PPC460EX processor through the use of mtdcr and mfdcr instructions.
Table 1. System Memory Address Map (Part 1 of 3)
Function
Sub Function
DDR SDRAM
Start Address
End Address
Size
16GB
256KB
64KB
704KB
64KB
256B
256B
256B
63.25KB
64KB
384KB
512KB
~3GB
256KB
64KB
1KB
0000 0000 0000 0000
0000 0004 0000 0000
0000 0004 0004 0000
0000 0004 0005 0000
0000 0004 0010 0000
0000 0004 0010 0000
0000 0004 0010 0100
0000 0004 0010 0200
0000 0004 0010 0300
0000 0004 0011 0000
0000 0004 0012 0000
0000 0004 0018 0000
0000 0004 0020 0000
0000 0004 BFF8 0000
0000 0004 BFFC 0000
0000 0004 BFFD 0000
0000 0004 BFFD 0400
0000 0004 BFFD 0800
0000 0004 BFFD 0C00
0000 0004 BFFD 1000
0000 0004 BFFD 1800
0000 0004 BFFD 2000
0000 0004 BFFD 2400
0000 0003 FFFF FFFF
0000 0004 0003 FFFF
0000 0004 0004 FFFF
0000 0004 000F FFFF
0000 0004 0010 FFFF
0000 0004 0010 00FF
0000 0004 0010 01FF
0000 0004 0010 02FF
0000 0004 0010 FFFF
0000 0004 0011 FFFF
0000 0004 0017 FFFF
0000 0004 001F FFFF
0000 0004 BFF7 FFFF
0000 0004 BFFB FFFF
0000 0004 BFFC FFFF
0000 0004 BFFD 03FF
0000 0004 BFFD 07FF
0000 0004 BFFD 0BFF
0000 0004 BFFD 0FFF
0000 0004 BFFD 17FF
0000 0004 BFFD 1FFF
0000 0004 BFFD 23FF
0000 0004 BFFF FFFF
SRAM (L2 Cache)
On-Chip Memory (OCM)
Reserved
1
Local Memory (LL)
I2O/DMA
I2O Registers
Reserved
HSDMA Registers
Reserved
1
Internal PLB Interfaces (LL)
PKA & TRNG (EIPPKP)
Reserved
Security Function (EIP94)
Reserved
USB 2.0 OTG
Reserved
USB 2.0 Host (OHCI)
USB 2.0 Host (EHCI)
AHBDMA for SATA
Reserved
1KB
1KB
Internal AHB Peripherals (LL)
1KB
SATA
2KB
Reserved
2KB
AHB Arbiter
1KB
Reserved
183KB
AMCC Proprietary
7
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