Revision 1.26 - June 16, 2008
PowerPC 440SPe Embedded Processor
Data Sheet
Table 6. Signal Functional Description (Sheet 1 of 8)
Notes:
1. Receiver input has hysteresis
2. Must pull up (recommended value is 3kΩ to 3.3V)
3. Must pull down (recommended value is 1kΩ)
4. If not used, must pull up (recommended value is 3kΩ to 3.3V)
5. If not used, must pull down (recommended value is 1kΩ)
6. Strapping input during reset; pull-up or pull-down required
Signal Name
Description
I/O
Type
Notes
PCI-Express 0:2 Interfaces
PCI Express Reference Clock: 100 MHz differential
clock pair. Input type is controlled by bit 3 of the
PESDR0_PLLLCT1[MCENT] register.
PCIE_REFCLK
PCIE_REFCLK
I
Diff PECL
0
1
2.5V CMOS or LVDS
2.5V LVPECL (recommended)
PCIE0Tx[7:0]
PCIE0Tx[7:0]
PCIE1:2Tx[3:0]
PCIE1:2Tx[3:0]
PCI Express Serial Data Transmit differential signals
LSB is 0.
V
V
DD=1.5V
DD=1.5V
O
LVDS
LVDS
X8 Mode: All PCIE0Tx[7:0]/PCIE0Tx[7:0] are used.
X4 Mode: Only PCIE0Tx[3:0]/PCIE0Tx[3:0] are used.
PCIE0Rx[7:0]
PCIE0Rx[7:0]
PCIE1:2Rx[3:0]
PCIE1:2Rx[3:0]
PCI Express Serial Data Receive differential signals
LSB is 0.
I
X8 Mode: All PCIE0Rx[7:0]/PCIE0Rx[7:0] are used.
X4 Mode: Only PCIE0Rx[3:0]/PCIE0Rx[3:0] are used
PCI Express Analog Observation point for internal
voltage regulator
PCIE0:2AVREG
O
PCIECalRP
PCIECalRN
Positive and negative inputs for a 1 Kohm ±1% PCI
Express External calibration resistor
I
I
PCIEPLLTSTON
Enable PCI Express PLL test modes.
PCI-X0 Interfaces
Ack64 or ECC1.
Normally used as Ack64 indicating that the target can
transfer data using 64 bits.
3.3V PCI or
PCIX0Ack64/PCIX0ECC1
I/O
4
1.5V PCI for
mode 2
or
Used as ECC1 for PCIX mode 2.
3.3V PCI or
PCIX0AD63:00
PCIX0BE7:0
Address/Data bus (bidirectional) for PCI-X0
PCI-X Byte Enables for PCI-X0
I/O
I/O
I
1.5V PCI for
mode 2
3.3V PCI or
1.5V PCI for
mode 2
Balls G and R for a 114 Ohm External calibration
resistor. Used to control PCI-X I/O Impedance at 57
Ohm.
PCIX0CalG0
PCIX0CalR0
NA
NA
Capable of PCI-X operation.
This analog input is sampled to configure PCI and
determine the state of the PCIX0VC output signal:
0.00V
(0.0V) = Conventional PCI & PCIX0VC = 0
DD
PCIX0Cap
I
0.49V
(1.0V) = PCI-X DDR 266 Mode 2 &
PCIX0VC = 1
DD
0.75V
1.00V
(2.5V) = PCI-X 66 & PCIX0VC = 0
DD
DD
(3.3V) = PCI-X 133 & PCIX0VC = 0
50
AMCC Proprietary
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
