Revision 1.21 – June 22, 2012
PPC440GX Embedded Processor
Data Sheet
Revision Log
Date
Contents of Modification
08/07/2002
08/30/2002
09/25/2002
10/22/2002
11/20/2002
Add revision log.
Change EMC0:1TxD0:1 and EMC0:1TxEn TOV from 15 to 11 ns.
Update for L2 cache
Add heat sink mounting information.
Update I/O timing data.
Update PCI-X I/O voltage specification.
Correct package drawing
01/07/2003
01/22/2003
Correct description of SysReset signal.
Update for 533MHz parts and add power supply current values.
Update DDR SDRAM timing.
03/25/2003
06/16/2003
07/15/2003
Change RTBIxTX and RX control signals to data signals.
Add 667MHz part numbers, update I/O specifications, and fill in missing data points.
Update information concerning higher speed parts, bus clock ratios, the duplicate trace signals, and initialization
strapping pins. Update Ethernet signals with new and moved signals.
07/17/2003
12/02/2003
01/13/2004
02/12/2004
02/25/2004
Remove IBM Confidential.
Revise DDR SDRAM I/O section.
Correct TrcTS6 signal data (pin assignment and multiplexing).
Restore VDD/OVDD voltage sequence restriction.
Add three Revision C part numbers.
Update part number list.
03/04/2004
Update dimensions on package drawing.
03/25/2004
05/12/2004
05/20/2004
06/15/2004
06/30/2004
Correct GMCTxClk signal description from input-only to I/O.
Add plastic package data, new power data, and update part number list.
Upgrade 533MHz ceramic part to 105°C rating.
Correct dimensions on ceramic package drawing.
Replace missing 533MHz C temperature range part.
Add information on minimum SysClk and TRST duration during power-on reset.
Remove power sequence restrictions note from Absolute Maximum Rating table.
Restate power sequencing restrictions in Recommended DC Operating Conditions table.
Convert to AppliedMicro format.
11/01/2004
12/09/2004
06/16/2005
07/01/2005
10/17/2005
Restore “Preliminary” to document classification.
Add S (no L2 cache support) temperature range part numbers.
Add reduced-lead ceramic and lead-free plastic part numbers.
Clarify DDR SDRAM interface diagram.
Remove metal-layer specification from technology description.
Add logo and number nomenclature to package drawing.
11/07/2005
12/22/2005
Update I/O timing specs for EMC0:3TxD, GMC0RxD0:3, GMC1RxD0:3, GMCRxDV, GMC1RxCtl, GMCRxD0:7,
GMCRxEr, GMCCrS, GMCTxD0:7.
AppliedMicro Proprietary
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AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
