PPC440GRX-SUA400T 参数 Datasheet PDF下载

Revision 1.11 – July 22, 2008

440GRx – PPC440GRx Embedded Processor

Preliminary Data Sheet

Address Maps

The PPC440GRx incorporates two address maps. The first is a fixed processor System Memory Address Map.

This address map defines the possible contents of various address regions which the processor can access. The

second is the DCR Address Map for Device Configuration Registers (DCRs). The DCRs are accessed by software

running on the PPC440GRx processor through the use of

mtdcr

and

mfdcr

instructions.

Table 1. System Memory Address Map (Sheet 1 of 2)

Function

Total System Memory Address Space

DDR SDRAM

Local Memory

Reserved

SRAM

On-Chip Memory

Reserved

Security Function

Security (PPC440GRx-S)

KASUMI Algorithm

Reserved

PCI

1

EBC

1

Reserved

I/O

Reserved

I/O

Reserved

Configuration Registers

PCI

1

Sub Function

Start Address

0 0000 0000

0 0000 0000

0 8000 0000

0 E001 0000

0 E001 4000

0 E010 0000

0 E018 0000

0 E018 0800

1 8000 0000

1 C000 0000

1 E000 0000

1 E800 0000

1 E801 0000

1 E880 0000

1 EC00 0000

1 EEC0 0000

1 EEC0 0008

1 EED0 0000

1 EED0 0004

1 EF40 0000

1 EF40 0040

End Address

1 FFFF FFFF

0 7FFF FFFF

0 E000 FFFF

0 E001 3FFF

0 E00F FFFF

0 E017 FFFF

0 E018 07FF

1 7FFF FFFF

1 BFFF FFFF

1 DFFF FFFF

1 E7FF FFFF

1 E800 FFFF

1E87F FFFF

1 EBFF FFFF

1 EEBF FFFF

1 EEC0 0007

1 EECF FFFF

1 EED0 0003

1 EF3F FFFF

1 EF40 003F

1 EF4F FFFF

Size

8GB

2GB

16KB

512KB

2KB

Memory

Controller

1GB

512MB

64KB

56MB

8B

Reserved

Interrupt Ack/Special Cycle

Reserved

Local Configuration Registers

Reserved

4B

64B

AMCC Proprietary

7