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PPC440GP-3FC400E 参数 Datasheet PDF下载

PPC440GP-3FC400E图片预览
型号: PPC440GP-3FC400E
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microprocessor, 32-Bit, 400MHz, CMOS, PBGA552, 25 X 25 MM, FLIP CHIP, PLASTIC, BGA-552]
分类和应用: PC
文件页数/大小: 83 页 / 1393 K
品牌: AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
 浏览型号PPC440GP-3FC400E的Datasheet PDF文件第55页浏览型号PPC440GP-3FC400E的Datasheet PDF文件第56页浏览型号PPC440GP-3FC400E的Datasheet PDF文件第57页浏览型号PPC440GP-3FC400E的Datasheet PDF文件第58页浏览型号PPC440GP-3FC400E的Datasheet PDF文件第60页浏览型号PPC440GP-3FC400E的Datasheet PDF文件第61页浏览型号PPC440GP-3FC400E的Datasheet PDF文件第62页浏览型号PPC440GP-3FC400E的Datasheet PDF文件第63页  
Revision 1.07 – October 4, 2007  
440GP – Power PC 440GP Embedded Processor  
Data Sheet  
Recommended DC Operating Conditions (Continued)  
Device operation beyond the conditions specified is not recommended. Extended operation beyond the recommended  
conditions can affect device reliability.  
Parameter  
Case Temperature rating for C package  
Case Temperature rating E for C package  
Case Temperature rating E for F package  
Notes:  
Symbol  
Minimum  
-40  
Typical  
Maximum  
+85  
Unit  
°C  
Notes  
TC  
6
6
6
TC  
TC  
-40  
+105  
°C  
-40  
+100  
°C  
1. PCI-X drivers meet PCI-X specifications.  
2. SVREF = SVDD/2  
3. The analog voltages used for the on-chip PLLs can be derived from the logic voltage, but must be filtered before entering the  
PPC440GP. See “Absolute Maximum Ratings” on page 55.  
4. During chip power-up, OVDD should begin to ramp before VDD. External voltage should not be applied to the chip I/O pins before  
OVDD is applied to the chip. A power-down cycle should complete (OVDD and VDD should both be below 0.4V) before a new power-  
up cycle is started.  
5. LPDL is least positive down level; MPUL is most positive up level.  
6. Case temperature, TC, is measured at top center of case surface with device soldered to circuit board.  
Input Capacitance  
Parameter  
Symbol  
Maximum  
Unit  
pF  
Notes  
CIN1  
Group 1 (2.5V SSTL I/O)  
12  
12  
12  
9
CIN2  
CIN3  
CIN4  
Group 2 (5V tolerant LVTTL I/O)  
Group 3 (PCI-X I/O)  
pF  
pF  
Group 4 (Receivers)  
pF  
DC Power Supply Loads  
Parameter  
Symbol  
Minimum  
Typical  
Maximum  
Unit  
Notes  
V
DD (1.8V) active operating current  
IDD  
915  
125  
560  
33  
mA  
mA  
mA  
mA  
2
2
OVDD (3.3V) active operating current  
SVDD (2.5V) active operating current  
AxVDD (1.8V) input current  
Notes:  
IODD  
ISDD  
IADD  
2
1, 2  
1. See “Absolute Maximum Ratings” on page 55 for filter recommendations.  
2. The current values listed above are not guaranteed to be the highest obtainable. These values are dependent on many factors including  
the type of applications running, clock rates, use of internal functional capabilities, external interface usage, case temperature, and the  
power supply voltages. Your specific application can produce significantly different results. VDD (logic) current and power are primarily  
dependent on the applications running and the use of internal chip functions (DMA, PCI, Ethernet, and so on). OVDD (I/O) current and  
power are primarily dependent on the capacitive loading, frequency, and utilization of the external buses.  
AMCC  
59