Revision 1.25 – December 18, 2006
440EP – PPC440EP Embedded Processor
Data Sheet
Power Sequencing
Startup sequencing of the power supply voltages is not required. However, a power-down cycle must complete
(OV and V are below +0.4V) before a new power-up cycle is started.
DD
DD
Table 9. Input Capacitance
Parameter
Symbol
Maximum
2.5
Unit
pF
pF
pF
pF
pF
pF
Notes
CIN1
Group 1 (2.5V SSTL I/O)
Group 2 (3.3V LVTTL I/O)
Group 3 (PCI I/O)
CIN2
CIN3
CIN4
CIN5
CIN6
2.1
2.5
Group 4 (Receivers)
0.9
Group 5 (3.3V tolerant CMOS I/O)
Group 6 (USB)
2.4
4.5
Table 10. Typical DC Power Supply Requirements
+1.5V Supply
(VDD+AVDD+SAVDD
+2.5V Supply
+3.3V Supply
Frequency (MHz)
Total
Unit
Notes
)
(SVDD
)
(OVDD)
333
400
533
667
1.15
1.24
1.43
2.08
1.15
1.15
1.15
1.15
0.04
0.04
0.04
0.04
2.34
2.43
2.62
3.27
W
W
W
W
1
1
1
1
Notes:
1. Typical Power is based on nominal voltage of VDD = +1.5V and TC = max. specified in Table 8 on page 60, while running Linux and a test
application that exercises each core with representative traffic.
Table 11. V Supply Power Dissipation
DD
Frequency (MHz)
+1.4V
0.96
1.04
1.20
1.74
+1.5V
1.15
1.24
1.43
2.08
+1.6V
1.38
1.49
1.71
2.52
Unit
W
Notes
333
1
1
1
1
400
W
533
W
667
W
Notes:
1. Power is based on VDD specified in the table and TC = max. specified in Table 8 on page 60, while running Linux and a test application
that exercises each core with representative traffic.
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