Revision 1.29 – May 07, 2008
440EP – PPC440EP Embedded Processor
Signal Lists
Data Sheet
The following table lists all the external signals in alphabetical order and shows the ball (pin) number on which the
signal appears. Multiplexed signals are shown with the default signal (following reset) not in brackets and alternate
signals in brackets. Multiplexed signals appear alphabetically multiple times in the list—once for each signal name
on the ball. The page number listed gives the page in “Signal Functional Description” on page 52 where the signals
in the indicated interface group begin. In cases where signals in the same interface group (for example, Ethernet)
have different names to distinguish variations in the mode of operation, the names are separated by a comma with
the primary mode name appearing first. These signals are listed only once, and appear alphabetically by the
primary mode name.
Table 5. Signals Listed Alphabetically (Sheet 1 of 24)
Signal Name
Ball
AE17
AD17
AF03
AF04
R04
Interface Group
Page
AGND
AVDD
Power
60
BA0
DDR SDRAM
53
53
BA1
BankSel0
BankSel1
BankSel2
BankSel3
R02
DDR SDRAM
R01
N01
[BusReq][USB2TermSel]GPIO31
AA23
J02
External Master Peripheral
DDR SDRAM
56
53
53
CAS
ClkEn
AF05
AE05
AD07
J01
DDR SDRAM
DM0
DM1
DM2
DDR SDRAM
53
DM3
L03
DM8
AF07
D18
[DMAAck0][IRQ8]GPIO47
[DMAAck1][IRQ4]GPIO44
[DMAAck2][PerAddr06]GPIO01
[DMAAck3][PerAddr03]GPIO04
[DMAReq0][IRQ7]GPIO46
DMAReq1[IRQ5][ModeCtrl]
[DMAReq2][PerAddr07]GPIO00
[DMAReq3][PerAddr04]GPIO03
DQS0
G25
External Slave Peripheral
External Slave Peripheral
55
55
B06
C07
B24
AC12
C08
D08
AD09
AC08
K03
DQS1
DQS2
DDR SDRAM
System
53
59
DQS3
M04
AC06
Y25
DQS8
[DrvrInh1]USB2LS0[RejectPkt]
[DrvrInh2]Halt
C25
AMCC Proprietary
19
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
