Revision 1.29 – May 07, 2008
440EP – PPC440EP Embedded Processor
Data Sheet
Table 19. I/O Specifications—PCI, USB, UART, IIC, SPI, Ethernet, System and Debug Interfaces (Sheet 2 of 3)
Notes:
1. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard.
2. EMCSync is a weak driver. Redrive EMCSync when driving more than one load.
Input (ns)
Output (ns)
Output Current (mA)
Signal
Clock
Notes
Setup Time Hold Time
Valid Delay
(TOV max)
Hold Time
(TOH min)
I/O H
(minimum)
I/O L
(minimum)
(TIS min)
(TIH min)
Ethernet SMII Interface
EMC0RxD
1.5
1.5
1
1
5.1
5.1
5.1
5.1
5.1
6.8
6.8
6.8
6.8
6.8
EMCRefClk
EMCRefClk
EMCRefClk
EMCRefClk
EMCRefClk
1
1
EMC0TxD
3.5
0
EMC1RxD
1
EMC1TxD
3.5
3.5
0
0
1
EMCSync
1, 2
Internal Peripheral Interface
IIC0SClk
n/a
n/a
10.2
10.2
10.2
10.2
10.2
10.2
10.2
n/a
IIC0Clk
IIC0Clk
IIC0SData
5
5
0
IIC1SClk
n/a
IIC0SData
0
2
2
n/a
SCPClkOut
SCPDI
7
7
0
0
n/a
n/a
SCPClkOut
SCPClkOut
SCPDO
6
n/a
UARTn_Rx
n/a
async
async
async
async
async
async
async
async
UARTn_Tx
10.3
n/a
7.1
UARTn_DCD
UARTn_DSR
UARTn_CTS
UARTn_DTR
UARTn_RI
n/a
n/a
n/a
na
na
10.3
n/a
7.1
n/a
UARTn_RTS
USB1DevXcvr
USB1DevXcvr
USB1HostXcvr
USB1HostXcvr
USB2DI0:7
10.3
USB 1.1
USB 1.1
USB 1.1
USB 1.1
n/a
7.1
3
3
3
3
0
0
0
0
USB 1.1
USB 1.1
USB 1.1
USB 1.1
n/a
USB1Clk
USB1Clk
USB1Clk
USB1Clk
USB2Clk
USB2Clk
USB2Clk
USB2Clk
USB2Clk
USB2Clk
7
5.2
7
0.05
0.02
0.05
USB2DO0:7
USB2LS0:1
USB2OM0:1
USB2RxAct
USB2RxDV
USB2RxErr
USB2Susp
3
3
0
0
5.1
6.8
n/a
n/a
7.1
9.6
n/a
n/a
3
3
3
3
0
0
0
0
7.1
9.6
7.1
9.6
7.1
9.6
USB2TermSel
USB2TxRdy
USB2TxVal
USB2XcvrSel
Interrupts Interface
IRQ0:9
7.1
9.6
6
0.1
n/a
n/a
3
3
0
0
7.1
9.6
7.1
9.6
n/a
n/a
async
72
AMCC Proprietary
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
