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PPC405EZ-CSAFFFTX 参数 Datasheet PDF下载

PPC405EZ-CSAFFFTX图片预览
型号: PPC405EZ-CSAFFFTX
PDF下载: 下载PDF文件 查看货源
内容描述: 的PowerPC 405EZ嵌入式处理器 [PowerPC 405EZ Embedded Processor]
分类和应用: PC
文件页数/大小: 54 页 / 814 K
品牌: AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
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Revision 1.27 - August 22, 2007  
PPC405EZ – PowerPC 405EZ Embedded Processor  
Analog-to-Digital Converter (ADC)  
Preliminary Data Sheet  
The ADC is a mixed-signal core. It uses the successive approximation (binary search) conversion technique to  
achieve minimal conversion time. The analog input range is 0.0V to Vref.  
Features include:  
• Internal 10-bit resolution SAR ADC  
• Sample and hold  
• Support for multiple conversion times such as  
– 3.25 μs with 4-MHz input clock  
– 52 μs with 250-kHz input clock  
• Comparator  
• Digital controller  
• 8-channel analog input (3.3V) with 8:1 analog multiplexer  
• 10-bit parallel digital outputs  
• Input trigger from Chameleon Timer supported  
• OPB interface with optional DMA support  
Digital-to-Analog Converter (DAC)  
The DAC is a 1-channel converter, optimized for low power applications. It provides unbuffered single-ended  
analog current output. The single analog current output can be tied directly to an output resistor to provide twos-  
complementary, single-ended voltage outputs.  
Features include:  
• 10-bit resolution at 30M samples/sec  
• Segmented DAC  
• Single-ended current outputs (6mA maximum swing at 3.3V)  
• Monotonicity ensured  
• Straight binary input  
• Internal bandgap voltage reference  
• Power management by means of Sleep Mode  
• Integrated functional test logic  
• Input trigger from Chameleon Timer supported  
• OPB interface with optional DMA support  
JTAG  
Features include:  
• IEEE 1149.1 test access port  
• JTAG Boundary Scan Description Language (BSDL)  
Refer to http://www.amcc.com/Embedded/Partners for a list of AMCC partners supplying probes for use with the  
JTAG interface.  
AMCC Proprietary  
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