Revision 2.03 – September 7, 2007
405GP – Power PC 405GP Embedded Processor
Data Sheet
Signals Listed by Ball Assignment—456-Ball Package (Part 1 of 3)
Ball
Signal Name
Ball
B14
B15
Signal Name
Ball
Signal Name
Ball
E14
E15
Signal Name
GND
A1
GND
DMAAck2
D1
PerWBE3
VDD
A2
GND
DMAAck1
D2
PerWBE0
VDD
VDD
A3
A4
A5
A6
A7
PerAddr1
PerCS3[GPIO12]
PerAddr8
B16
B17
B18
B19
B20
PCIAD1
Res – 27/OVDD – 35
PCIAD6
D3
D4
D5
D6
D7
PerPar0
GND
E16
E17
E18
E19
E20
PerAddr0
PerAddr4
PerAddr7
GND
OVDD
GND
PCIReq2
OVDD
OVDD
DMAReq3
PCIClk
A8
PerAddr15
PerCS6[GPIO15]
PerAddr19
GND
B21
B22
B23
B24
B25
B26
C1
PCIAD8
PCIAD11
PCIAD12
PCIReset
GND
D8
PerAddr11
PerAddr14
PerAddr17
PerAddr20
PerAddr23
PerAddr22
DMAReq1
PerAddr31
DMAAck0
PCIAD4
E21
E22
E23
E24
E25
E26
F1
A9
D9
GND
DrvrInh2
DrvrInh1
PHYTxClk
PCIParity
GND
A10
A11
A12
A13
A14
A15
A16
A17
A18
D10
D11
D12
D13
D14
D15
D16
D17
D18
PerAddr25
PerAddr26
PerAddr28
PerAddr29
GND
GND
PerR/W
C2
PerOE
F2
PerBLast
EOT0/TC0
PerWBE2
OVDD
C3
GND
F3
PCIAD0
C4
PerCS1[GPIO10]
PerCS2[GPIO11]
F4
PCIAD3
C5
GPIO1[TS1E]
F5
OVDD
A19
A20
A21
A22
A23
A24
A25
Res – 27/GND – 35
PCIAD7
C6
C7
PerAddr6
PerAddr10
D19
D20
D21
D22
D23
D24
D25
PCIC0[BE0]
Reserved
PCIAD10
SysReset
GND
F22
F23
F24
F25
F26
G1
PCIGnt2
PCIC1[BE1]
PCIAD15
GND
GND
C8
PerAddr13
GPIO3[TS1O]
PCIAD9
C9
PerAddr16
C10
C11
C12
PerAddr18
PCIReq3
DMAReq2
TmrClk
PerData29
EOT1/TC1
AVDD
SysClk
DMAAck3
G2
Res – 27/OVDD – 35
A26
B1
GND
PerErr
GND
C13
C14
C15
D26
E1
TestEn
PerPar3
PerWBE1
G3
G4
G5
PerPar2
PerPar1
OVDD
PerAddr27
PerAddr30
B2
E2
OVDD
B3
B4
B5
B6
PerCS0
PerAddr2
PerAddr3
PerAddr5
C16
C17
C18
C19
DMAReq0
PCIAD2
E3
E4
E5
E6
PerReady
PerClk
GND
G22
G23
G24
G25
PCIReq4
PCISErr
PCIPErr
PCIAD5
OVDD
PCIReq0[Gnt]
OVDD
OVDD
B7
B8
PerAddr9
PerAddr12
C20
C21
C22
C23
C24
C25
GPIO2[TS2E]
PCIReq1
E7
E8
G26
H1
H2
H3
H4
H5
PCITRDY
Res – 27/GND – 35
PerData30
PerData28
PerData31
OVDD
B9
PerCS4[GPIO13]
PerCS5[GPIO14]
PerCS7[GPIO16]
PerAddr21
PCIAD13
PCIINT[PerWE]
GND
E9
GND
VDD
B10
B11
B12
E10
E11
E12
VDD
VDD
RcvrInh
OVDD
B13
H23
H24
H25
H26
PerAddr24
PCIStop
C26
M1
M2
M3
M4
PCIAD14
PerData12
PerData17
PerData14
PerData15
E13
P14
P15
P16
P22
GND
GND
GND
GND
GND
H22
U1
U2
U3
U4
PerData2
HoldAck
EMCMDClk
PCIDevSel
PCIGnt3
PerData1
PerData0
30
AMCC