Revision 1.09 - August 21, 2007
PPC405EX – PowerPC 405EX Embedded Processor
Preliminary Data Sheet
Table 14. DC Power Supply Loads with DDR2 SDRAM
Parameter
Symbol
Typical
920
40
Maximum
1390
50
Unit
mA
mA
mA
mA
mA
mA
mA
mA
Notes
V
DD (+1.2V) active operating current
IDD
1
1
1
1
1
1
1
1
AVDD (+1.2V) active operating current
AHVDD (+2.5V) active operating current
OVDD (+3.3V) active operating current
SVDD (+1.8V) active operating current
EOVDD (+2.5V) active operating current
SAVDD (+2.5V) active operating current
EAVDD (+2.5V) active operating current
Notes:
IADD
IAHDD
IODD
100
40
120
50
ISDD
180
20
210
IEODD
ISADD
IEADD
30
100
100
120
120
1. Typical and Maximum values are estimates and subject to change.
Test Conditions
Clock timing and switching characteristics are specified in accordance with minimum
operating conditions shown in the table “Recommended DC Operating Conditions” on
page 47. For all signals, AC specifications are characterized at TC = 85°C with the test
load shown in the figure to the right.
Output
Pin
10pF
Table 15. System Clocking Specifications
Symbol
CPU
Parameter
Min
Max
Units
PFC
Processor clock frequency (must be ≥ SCFC)
333.33
666.66
MHz
SysClk Input
SCFC
Frequency
33.33
na
100
± 0.1
60
MHz
ns
SCTCS
SCTCH
SCTCL
SCRT
Edge stability (phase jitter, cycle-to-cycle)
High time (% of nominal period)
Low time (% of nominal period)
Rise time
40
%
40
60
%
na
0.4
ns
Other Clocks
VCOFC
VCO frequency
PLB frequency
OPB frequency
600
133
66
1800
200
MHz
MHz
MHz
PLBFC
OPBFC
100
50
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