Revision 1.27 - August 22, 2007
PPC405EZ – PowerPC 405EZ Embedded Processor
Preliminary Data Sheet
Table 6. Signal Functional Description (Sheet 5 of 6)
Notes:
1. Receiver input has hysteresis.
2. Must pull up. See “Pull-Up and Pull-Down Resistors” on page 34 for recommended termination values.
3. Must pull down. See “Pull-Up and Pull-Down Resistors” on page 34 for recommended termination values.
4. If not used, must pull up.
5. If not used, must pull down.
6. Strapping input during reset; pull up or pull down as required.
Signal Name
Description
I/O
Type
Notes
UART Peripheral Interface
UART0_CTS
UART0_DCD
UART0_DSR
UART0_DTR
UART0_RI
Clear to send.
I
I
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
Data carrier detect.
Data set ready.
Data terminal ready.
Ring indicator.
Request to send.
Receive data.
I
O
I
UART0_RTS
UART0_Rx
UART0_Tx
O
I
5
5
Transmit data.
Receive data
O
I
UART1_Rx
UART1_Tx
Transmit data
O
USB Interface
USB1FClk
48 MHz clock for USB
I
3.3V LVTTL
5V tolerant
USB Diff
USB1DEV0
USB1DEV0
USB1HOST0
USB1HOST0
USB1HOST1
USB1HOST1
Device differential + data signal
Device differential − data signal
Host 0 differential + data signal
Host 0 differential − data signal
Host 1 differential + data signal
Host 1 differential − data signal
I/O
5V tolerant
USB Diff
I/O
I/O
I/O
I/O
I/O
5V tolerant
USB Diff
5V tolerant
USB Diff
5V tolerant
USB Diff
5V tolerant
USB Diff
AMCC Proprietary
39