Revision 1.27 - August 22, 2007
PPC405EZ – PowerPC 405EZ Embedded Processor
Preliminary Data Sheet
Table 6. Signal Functional Description (Sheet 3 of 6)
Notes:
1. Receiver input has hysteresis.
2. Must pull up. See “Pull-Up and Pull-Down Resistors” on page 34 for recommended termination values.
3. Must pull down. See “Pull-Up and Pull-Down Resistors” on page 34 for recommended termination values.
4. If not used, must pull up.
5. If not used, must pull down.
6. Strapping input during reset; pull up or pull down as required.
Signal Name
Description
I/O
Type
Notes
Analog to Digital (ADC) Interface
Analog inputs.
Analog Wide-
Wire receiver
ADC_In0:7
I
Analog inputs to the ADC should be referenced to ADC_AGND and
should not exceed the value of VRef.
ADC_InTrig
ADC_VRef
Input trigger.
I
I
3.3V LVTTL
Analog input reference voltage.
Analog Wide-
Wire receiver
Allowable voltage range is 2V–ADC_AVDD
.
Digital to Analog (DAC) Interface
Reference voltage for the gate of the DAC current sources. This
voltage should be connected to the DAC_AVDD voltage with a 1nF
Analog Wide-
Wire driver
DAC_CRef
I
filter capacitor at the signal pin.
Analog positive output current.
Input trigger.
Analog Wide-
Wire driver
DAC_IOutP
DAC_IPTrig
DAC_IRRef
O
I
3.3V LVTTL
Analog Wide-
Wire driver
Analog input reference current.
I
Analog band gap voltage reference input.
Analog Wide-
Wire driver
DAC_VRef
DAC_GRef
I
I
Allowable voltage range is 1.15V–1.26V, with a typical value of
1.174V.
Reference voltage for the gate of the cascode device in the DAC
current sources. This voltage should be connected to the DAC_AVDD
voltage with a 1nF filter capacitor at the signal pin.
Analog Wide-
Wire driver
Controller Area Network Interface
3.3V LVTTL
Rcvr w/pull-up
CAN0_Rx
Receive input.
I
5
5
CAN0_Tx
CAN0_TxE
CAN1_Rx
CAN1_Tx
CAN1_TxE
Transmit output.
Transmit enable.
Receive input.
O
O
I
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
Transmit output.
Transmit enable.
O
O
AMCC Proprietary
37