Revision 1.12 - Novenber 20, 2007
PPC405EX – PowerPC 405EX Embedded Processor
Preliminary Data Sheet
Table 9. Recommended DC Operating Conditions (Sheet 1 of 2)
Device operation beyond the conditions specified is not recommended. Extended operation beyond the recommended
conditions can affect device reliability.
Parameter
Logic Supply Voltage
Symbol
Minimum
+1.1
Typical
+1.2
Maximum
+1.3
Unit
V
Notes
VDD
OVDD
SVDD
I/O Supply Voltage
+3.15
+3.3
+3.45
V
SDRAM DDR1(2) Supply Voltage
CMOS Supply Voltage
+2.4 (+1.7)
+2.4
+2.5 (+1.8)
+2.5
+2.6 (+1.9)
+2.6
V
EOVDD
V
AHVDD
SAVDD
EAVDD
PLL Analog Supply Voltage
+2.4
+2.5
+1.2
+2.6
V
AVDD
VIL
Analog Supply Voltage
+1.1
0
+1.3
+0.8
+3.6
+0.4
+3.6
+0.7
+3.6
+0.4
+2.7
V
V
V
V
V
V
V
V
V
I/O Input Low (3.3V LVTTL)
VIH
I/O Input High (3.3V LVTTL)
+2.0
0
VOL
VOH
VIL
I/O Output Low (3.3V LVTTL)
I/O Output High (3.3V LVTTL)
I/O Input Low (3.3V tol, 2.5V CMOS)
I/O Input High (3.3V tol, 2.5V CMOS)
I/O Output Low (3.3V tol, 2.5V CMOS)
I/O Output High (3.3V tol, 2.5V CMOS)
+2.4
0
VIH
+1.7
0
VOL
VOH
+2.0
S
VREF −0.18
VIL
VIH
I/O Input Low DDR1 (DDR2) (SSTL2)
I/O Input High DDR1 (DDR2) (SSTL2)
−0.3
V
V
(0.125)
SVREF + 0.18
(0.125)
SVDD + 0.3
VOL
VOH
VICM
VIL
I/O Output Low DDR1 (DDR2) (SSTL2)
I/O Output High DDR1 (DDR2) (SSTL2)
I/O Input Common-Mode
See JESD8-9 (JESD8-15A) standard.
See JESD8-9 (JESD8-15A) standard.
V
V
V
V
V
V
V
VDD
0
V
ICM −0.05
+1.9
I/O Input Low (LVDS)
−0.3
VIH
VICM + 0.05
I/O Input High (LVDS)
VOL
VOH
I/O Output Low (LVDS)
+0.832
+1.243
+1.01
+1.197
+1.509
I/O Output High (LVDS)
+1.377
Input Leakage Current
(no pull-up or pull-down)
IIL1
IIL2
IIL3
0
1
µA
µA
µA
Input Leakage Current
(with internal pull-down)
0 (LPDL)
−150 (LPDL)
200 (MPUL)
0 (MPUL)
1
1
Input Leakage Current
(with internal pull-up)
48
AMCC Proprietary
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
