Revision 1.16 – July 19, 2006
440GR – PPC440GR Embedded Processor
Preliminary Data Sheet
Table 17. I/O Specifications—All Speeds (Sheet 2 of 2)
Notes:
1. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard.
Input (ns)
Output (ns)
Output Current (mA)
Signal
Clock
Notes
Setup Time Hold Time
Valid Delay
(TOV max)
Hold Time
(TOH min)
I/O H
(minimum)
I/O L
(minimum)
(TIS min)
(TIH min)
Internal Peripheral Interface
IIC0SClk
n/a
n/a
n/a
n/a
5
5
0
0
15.3
15.3
15.3
15.3
15.3
15.3
15.3
na
10.2
10.2
10.2
10.2
10.2
10.2
10.2
na
IIC0SData
IIC1SClk
IIC1SData
SCPClkOut
SCPDI
7
2
6
0
7
2
n/a
6
n/a
0
SCPDO
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
UARTSerClk
UARTn_Rx
UARTn_Tx
UARTn_DCD
UARTn_DSR
UARTn_CTS
UARTn_DTR
UARTn_RI
UARTn_RTS
Interrupts Interface
IRQ0:9
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
na
na
10.3
na
7.1
na
na
na
na
na
10.3
na
7.1
na
10.3
7.1
n/a
n/a
n/a
n/a
na
na
JTAG Interface
TCK
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
na
na
na
na
async
async
async
async
async
TDI
TDO
15.3
na
10.2
na
TMS
TRST
na
na
System Interface
SysClk
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
na
na
na
na
na
na
7.1
na
na
TmrClk1:2
SysReset
Halt
async
async
async
async
async
na
na
SysErr
10.3
na
TestEn
DrvrInh1:2
RcvrInh
na
GPIO00:63
PSROOut
Trace Interface
TrcClk
10.3
7.1
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
10.3
10.3
10.3
10.3
7.1
7.1
7.1
7.1
TrcBS0:2
TrcES0:4
TrcTS0:6
68
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