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EPM7192SQC160-10 参数 Datasheet PDF下载

EPM7192SQC160-10图片预览
型号: EPM7192SQC160-10
PDF下载: 下载PDF文件 查看货源
内容描述: 可编程逻辑器件系列 [Programmable Logic Device Family]
分类和应用: 可编程逻辑器件输入元件LTE时钟
文件页数/大小: 62 页 / 1087 K
品牌: ALTERA [ ALTERA CORPORATION ]
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MAX 7000 Programmable Logic Device Family Data Sheet  
The compiler can allocate up to three sets of up to five parallel expanders  
automatically to the macrocells that require additional product terms.  
Each set of five parallel expanders incurs a small, incremental timing  
delay (tPEXP). For example, if a macrocell requires 14 product terms, the  
Compiler uses the five dedicated product terms within the macrocell and  
allocates two sets of parallel expanders; the first set includes five product  
terms and the second set includes four product terms, increasing the total  
delay by 2 × tPEXP  
.
Two groups of 8 macrocells within each LAB (e.g., macrocells  
1 through 8 and 9 through 16) form two chains to lend or borrow parallel  
expanders. A macrocell borrows parallel expanders from lower-  
numbered macrocells. For example, macrocell 8 can borrow parallel  
expanders from macrocell 7, from macrocells 7 and 6, or from macrocells  
7, 6, and 5. Within each group of 8, the lowest-numbered macrocell can  
only lend parallel expanders and the highest-numbered macrocell can  
only borrow them. Figure 6 shows how parallel expanders can be  
borrowed from a neighboring macrocell.  
Figure 6. Parallel Expanders  
Unused product terms in a macrocell can be allocated to a neighboring macrocell.  
From  
Previous  
Macrocell  
Preset  
Product-  
Term  
Select  
Matrix  
Macrocell  
Product-  
Term Logic  
Clock  
Clear  
Preset  
Product-  
Term  
Select  
Matrix  
Macrocell  
Product-  
Term Logic  
Clock  
Clear  
To Next  
Macrocell  
36 Signals 16 Shared  
from PIA  
Expanders  
Altera Corporation  
13  
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