14–10
Chapter 14: Using Jam STAPL for ISP via an Embedded Processor
Software Development
If the target processor does not invert TDO, the code should look like:
tdo=(read_byteblaster(1)&0x80)?1:0;
To map the signals to the correct addresses, use the left shift (<<) or right shift (>>)
operators. For example, if TMSand TDIare at ports 2 and 3, respectively, the code
would be as follows:
data=(((tdi?0x40:0)>>3)|((tms?0x02:0)<<1));
Apply the same process to TCKand TDO.
The read_byteblasterand write_byteblastersignals use the inp()and
outp()functions from the conio.h library, respectively, to read and write to the port.
If these functions are not available, equivalent functions should be substituted.
Step 3: Handle Text Messages from jbi_export()
The jbi_export()function sends text messages to stdio, using the printf()
function. The Jam STAPL Byte-Code Player uses the jbi_export()signal to pass
information (for example, the device UES or USERCODE) to the operating system or
software that calls the Player. The function passes text (in the form of a string) and
numbers (in the form of a decimal integer).
f
For definitions of these terms, refer to AN 39: IEEE 1149.1 (JTAG) Boundary-Scan
Testing in Altera Devices.
If there is no device available to stdout, the information can be redirected to a file or
storage device, or passed as a variable back to the program that calls the Player.
Step 4: Customize Delay Calibration
The calibrate_delay()function determines how many loops the host processor
runs in a millisecond. This calibration is important because accurate delays are used
in programming and configuration. By default, this number is hard-coded as 1,000
loops per millisecond and represented as the following assignment:
one_ms_delay = 1000
If this parameter is known, it should be adjusted accordingly. If it is not known, you
can use code similar to that for Windows and DOS platforms. Code is included for
these platforms that count the number of clock cycles that run in the time it takes to
execute a single while loop. This code is sampled over multiple tests and averaged to
produce an accurate result upon which the delay can be based. The advantage to this
approach is that calibration can vary based on the speed of the host processor.
Once the Jam STAPL Byte-Code Player is ported and working, verify the timing and
speed of the JTAG port at the target device. Timing parameters in MAX II devices
should comply with the values given in the DC and Switching Characteristics chapter in
the MAX II Device Handbook.
If the Jam STAPL Byte-Code Player does not operate within the timing specifications,
the code should be optimized with the appropriate delays. Timing violations can
occur if the processor is very powerful and can generate TCK at a rate faster than 18
MHz.
MAX II Device Handbook
© October 2008 Altera Corporation
ALTERA [ ALTERA CORPORATION ]
