11. In-System Programmability
Guidelines for MAX II Devices
MII51013-1.7
Introduction
As time-to-market pressure increases, design engineers require advanced system-
level products to ensure problem-free development and manufacturing.
Programmable logic devices (PLDs) with in-system programmability (ISP) can help
accelerate development time, facilitate in-field upgrades, simplify the manufacturing
flow, lower inventory costs, and improve printed circuit board (PCB) testing
capabilities. Altera
®
ISP-capable MAX
®
II devices can be programmed and
reprogrammed in-system via the IEEE Std. 1149.1 Joint Test Action Group (JTAG)
interface. This interface allows MAX II devices to be programmed and the PCB to be
functionally tested in a single manufacturing step, saving testing time and assembly
costs. This chapter describes guidelines you should follow to design successfully with
ISP, including:
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General ISP Guidelines
This section provides guidelines that help you design successfully for ISP-capable
MAX II devices. These guidelines should be used regardless of your specific design
implementation.
Operating Conditions
Each MAX II device has several parametric ratings, or operating conditions, that are
required for proper operation. Although MAX II devices can exceed these conditions
when in user mode and still operate correctly, these conditions should not be
exceeded during in-system programming. Violating any of the operating conditions
during in-system programming can result in programming failures or incorrectly
programmed devices. V
CCIO
of all I/O banks and V
CCINT
of the device must be fully
powered up for ISP to function.
ISP Voltage
The V
CCINT
and V
CCIO
level specified in the device operating conditions table must be
maintained on the V
CCINT
and V
CCIO
pins during in-system programming to ensure that
the device’s flash cells are programmed correctly. The V
CCINT
and V
CCIO
specification
applies for both commercial- and industrial-temperature-grade devices.
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