FLEX 6000 Programmable Logic Device Family Data Sheet
Figure 19. FLEX 6000 Timing Model
tROW
Carry-In from Cascade-In from
Previous LE Previous LE
tCASC_TO_OUT
tCARRY_TO_OUT
tDATA_TO_OUT
tREG_TO_OUT
tSU
tH
tCO
tCLR
tREG_TO_REG
tCASC_TO_REG
tCARRY_TO_REG
tDATA_TO_REG
tLOCAL
tCOL
tC
tLD_CLR
tLEGLOBAL
tCARRY_TO_CARRY
tREG_TO_CARRY
tDATA_TO_CARRY
tCARRY_TO_CASC
tCASC_TO_CASC
tREG_TO_CASC
tDATA_TO_CASC
LE
tLABCARRY
tLABCASC
tDIN_D
tDIN_C
Carry-out to Carry-out to Cascade-out Cascade-out
Next LE in Next LE in
Same LAB Next LAB
to Next LE in to Next LE in
Same LAB
Next LAB
I/O Pin
tOD1
tOD2
tOD3
tXZ
tIOE
tZX1
tZX2
tZX3
tIN
tIN_DELAY
IOE
Altera Corporation
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