FLEX 10K Embedded Programmable Logic Device Family Data Sheet
Table 68. EPF10K100 Device Interconnect Timing Microparameters
Note (1)
Symbol
-3DX Speed Grade -3 Speed Grade -4 Speed Grade
Unit
Min
Max
Min
Max
Min
Max
tDIN2IOE
tDIN2LE
10.3
4.8
7.3
6.2
10.3
4.8
7.3
6.2
12.2
6.0
ns
ns
ns
ns
tDIN2DATA
11.0
7.7
tDCLK2IOE without ClockLock or
ClockBoost circuitry
tDCLK2IOE with ClockLock or ClockBoost
circuitry
2.3
4.8
2.3
–
4.8
–
–
6.0
–
ns
ns
ns
tDCLK2LE without ClockLock or
ClockBoost circuitry
tDCLK2LE with ClockLock or ClockBoost
circuitry
tSAMELAB
0.4
4.9
0.4
4.9
0.5
5.5
ns
ns
ns
ns
ns
ns
ns
ns
tSAMEROW
tSAMECOLUMN
tDIFFROW
5.1
5.1
5.4
10.0
14.9
6.9
10.0
14.9
6.9
10.9
16.4
8.1
tTWOROWS
tLEPERIPH
tLABCARRY
tLABCASC
0.9
0.9
1.1
3.0
3.0
3.2
Altera Corporation
87
ALTERA [ ALTERA CORPORATION ]
